MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 139
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MC68HC908JK3
Manufacturer Part Number
MC68HC908JK3
Description
MC68HC908JK1
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3.pdf
(210 pages)
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11.4.1 ADC Port I/O Pins
MC68H(R)C908JL3
MOTOROLA
INTERNAL
DATA BUS
AIEN
INTERRUPT
LOGIC
READ DDRB/DDRD
WRITE DDRB/DDRD
WRITE PTB/PTD
READ PTB/PTD
COCO
BUS CLOCK
—
CONVERSION
COMPLETE
Rev. 1.0
PTB0–PTB7 and PTD0–PTD3 are general-purpose I/O pins that are
shared with the ADC channels. The channel select bits (ADC Status and
Control register, $003C), define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
RESET
Figure 11-2. ADC Block Diagram
ADIV[2:0]
ADC DATA REGISTER
Analog-to-Digital Converter (ADC)
GENERATOR
CLOCK
ADC
ADC CLOCK
ADICLK
DDRBx/DDRDx
PTBx/PTDx
ADC VOLTAGE IN
ADCVIN
DISABLE
(1 OF 12 CHANNELS)
Analog-to-Digital Converter (ADC)
DISABLE
CHANNEL
SELECT
ADC CHANNEL x
Functional Description
ADCx
Technical Data
CH[4:0]
139