MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 77
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MC68HC908JK3
Manufacturer Part Number
MC68HC908JK3
Description
MC68HC908JK1
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3.pdf
(210 pages)
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7.4.2 Active Resets from Internal Sources
MC68H(R)C908JL3
MOTOROLA
OSCOUT
RST
IAB
—
PC
Rev. 1.0
All internal reset sources actively pull the RST pin low for 32 2OSCOUT
cycles to allow resetting of external peripherals. The internal reset signal
IRST continues to be asserted for an additional 32 cycles (
An internal reset can be caused by an illegal address, illegal opcode,
COP time-out, or POR. (See
Note that for POR resets, the SIM cycles through 4096 2OSCOUT
cycles during which the SIM forces the RST pin low. The internal reset
signal then follows the sequence from the falling edge of RST shown in
Figure 7-5
The COP reset is asynchronous to the bus clock.
2OSCOUT
IRST
RST
IAB
Figure 7-4. External Reset Timing
System Integration Module (SIM)
.
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
Figure 7-6. Sources of Internal Reset
Figure 7-5. Internal Reset Timing
RST PULLED LOW BY MCU
COPRST
32 CYCLES
POR
Figure 7-6 . Sources of Internal Reset
LVI
VECT H VECT L
INTERNAL RESET
System Integration Module (SIM)
32 CYCLES
Reset and System Initialization
VECTOR HIGH
Figure 7-5
Technical Data
77
.)
).