MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 46

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

FLASH Memory (FLASH)
4.9 FLASH Block Protect Register
Technical Data
46
Address:
The FLASH Block Protect Register is implemented as an 8-bit I/O
register. The value in this register determines the starting address of the
protected range within the FLASH memory.
BPR[7:1], bit-0 — FLASH Protection Register Bits [7:1]
Reset:
Read:
Write:
These eight bits in FLBPR (bit-0 is always 0) represent bits [12:5] of
a 16-bit memory address. Bits [15:13] are logic 1s and bits [4:0] are
logic 0s.
The resultant 16-bit address is used for specifying the start address
of the FLASH memory for block protection. The FLASH is protected
from this start address to the end of FLASH memory, at $FFFF. With
this mechanism, the protect start address can be XX00, XX40, XX80,
or XXC0 within the FLASH memory.
Examples of protect start address:
Figure 4-3. FLASH Block Protect Register (FLBPR)
$FE09
BPR7
Bit 7
and so on...
0
$DE (1101 1110)
$FE (1111 1110)
$62 (0110 0010)
$64 (0110 0100)
$68 (0110 1000)
FLASH Memory (FLASH)
BPR[7:0]
$00–$60
BPR6
$FF
6
0
BPR5
5
0
The entire FLASH memory is not protected.
BPR4
The entire FLASH memory is protected.
4
0
Start of Address of Protect Range
$EC40 (1110 1100 0100 0000)
$EC80 (1110 1100 1000 0000)
$ED00 (1110 1101 0000 0000)
$FBC0 (1111 1011 11 0 0 0000)
$FFC0 (1111 1111 1100 0000)
BPR3
3
0
MC68H(R)C908JL3
BPR2
2
0
BPR1
1
0
MOTOROLA
—
Rev. 1.0
Bit 0
0
0