MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 56
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MC68HC908JK3
Manufacturer Part Number
MC68HC908JK3
Description
MC68HC908JK1
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3.pdf
(210 pages)
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Central Processor Unit (CPU)
Technical Data
56
5 are set permanently to logic 1. The following paragraphs describe the
functions of the condition code register.
V — Overflow Flag
H — Half-Carry Flag
Reset:
The CPU sets the overflow flag when a two's complement overflow
occurs. The signed branch instructions BGT, BGE, BLE, and BLT use
the overflow flag.
The CPU sets the half-carry flag when a carry occurs between
accumulator bits 3 and 4 during an add-without-carry (ADD) or add-
with-carry (ADC) operation. The half-carry flag is required for binary-
coded decimal (BCD) arithmetic operations. The DAA instruction uses
the states of the H and C flags to determine the appropriate correction
factor.
Read:
Write:
1 = Overflow
0 = No overflow
1 = Carry between bits 3 and 4
0 = No carry between bits 3 and 4
X = Indeterminate
Bit 7
V
X
Central Processor Unit (CPU)
Figure 6-6. Condition Code Register (CCR)
6
1
1
5
1
1
4
H
X
3
1
I
MC68H(R)C908JL3
2
N
X
1
Z
X
MOTOROLA
—
Rev. 1.0
Bit 0
C
X