MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 87
MC68HC908JK3
Manufacturer Part Number
MC68HC908JK3
Description
MC68HC908JK1
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3.pdf
(210 pages)
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7.6.2.3 Interrupt Status Register 3
7.6.3 Reset
7.6.4 Break Interrupts
7.6.5 Status Flag Protection in Break Mode
MC68H(R)C908JL3
MOTOROLA
—
Rev. 1.0
Address:
I
Bit 1 to 7 — Always read 0
All reset sources always have equal and highest priority and cannot be
arbitrated.
The break module can stop normal program flow at a software-
programmable break point by asserting its break interrupt output. (See
Section 17. Break Module
break state by forcing it to the SWI vector location. Refer to the break
interrupt subsection of each module to see how each module is affected
by the break state.
The SIM controls whether status flags contained in other modules can
be cleared during break mode. The user can select whether flags are
F
Reset:
Read:
Write:
15 — Interrupt Flags
These flags indicate the presence of interrupt requests from the
sources shown in
1 = Interrupt request present
0 = No interrupt request present
$FE06
Bit 7
R
R
0
0
System Integration Module (SIM)
Figure 7-14. Interrupt Status Register 3 (INT3)
= Reserved
R
6
0
0
Table
R
5
0
0
7-3.
(BREAK).) The SIM puts the CPU into the
R
4
0
0
R
3
0
0
System Integration Module (SIM)
R
2
0
0
Exception Control
R
1
0
0
Technical Data
Bit 0
IF15
R
0
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