MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 15
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MC68HC908JK3
Manufacturer Part Number
MC68HC908JK3
Description
MC68HC908JK1
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3.pdf
(210 pages)
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MC68H(R)C908JL3
MOTOROLA
Technical Data — MC68H(R)C908JL3
—
Rev. 1.0
Figure
1-1
1-2
2-1
2-2
4-1
4-2
4-3
5-1
5-2
6-1
6-2
6-3
6-4
6-5
6-6
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
7-9
7-10 Interrupt Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
MCU Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Control, Status, and Data Registers . . . . . . . . . . . . . . . . . . . . . 30
FLASH Control Register (FLCR) . . . . . . . . . . . . . . . . . . . . . . . 40
FLASH Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . . 45
FLASH Block Protect Register (FLBPR). . . . . . . . . . . . . . . . . . 46
Configuration Register 2 (CONFIG2) . . . . . . . . . . . . . . . . . . . . 48
Configuration Register 1 (CONFIG1) . . . . . . . . . . . . . . . . . . . . 49
CPU Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Accumulator (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Index Register (H:X) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Stack Pointer (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Program Counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Condition Code Register (CCR) . . . . . . . . . . . . . . . . . . . . . . . . 56
SIM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
SIM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
SIM Clock Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
External Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Internal Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Sources of Internal Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
POR Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Interrupt Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
List of Figures
Title
List of Figures
Technical Data
Page
15