MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 113

• Manufacturer Part Number: MC68HC908JK3EMP
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

9.4.2 Baud Rate
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
Table 9-2
and monitor mode.
When the host computer has completed downloading code into the MCU
RAM, the host then sends a RUN command, which executes an RTI,
which sends control to the address on the stack pointer.
The communication baud rate is dependant on oscillator frequency. The
state of PTB3 also affects baud rate if entry to monitor mode is by IRQ1 =
V
pin is at logic zero upon entry into monitor mode, the divide by ratio is
512.
Monitor
Modes
DD
User
Blank reset vector,
Notes:
1. If the high voltage (V
IRQ1 = V
Monitor Mode
asserts its COP enable output. The COP is a mask option enabled or disabled by the
COPD bit in the configuration register.
—
+ V
IRQ1 = V
Entry By:
Rev. 2.0
HI
. When PTB3 is high, the divide by ratio is 1024. If the PTB3
Disabled
is a summary of the vector differences between user mode
DD
Enabled
Table 9-2. Monitor Mode Vector Differences
COP
DD
+ V
Table 9-3. Monitor Baud Rate Selection
Monitor ROM (MON)
HI
(1)
DD
Vector
$FEFE
$FFFE
Reset
High
+ V
Input Clock
4.9152 MHz
9.8304 MHz
4.9152 MHz
9.8304 MHz
4.9152 MHz
Frequency
HI
) is removed from the IRQ1 pin or the RST pin, the SIM
Vector
$FFFF
$FEFF
Reset
Low
Functions
$FEFC
Vector
$FFFC
Break
High
PTB3
X
X
0
1
1
$FEFD
Vector
$FFFD
Break
Low
Functional Description
Monitor ROM (MON)
Baud Rate
9600 bps
9600 bps
4800 bps
9600 bps
4800 bps
Vector
$FFFC
$FEFC
High
SWI
Technical Data
Vector
$FFFD
$FEFD
Low
SWI
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