MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 145

no-image

MC68HC908JK3EMP

Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
11.4.1 ADC Port I/O Pins
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
INTERNAL
DATA BUS
AIEN
INTERRUPT
LOGIC
READ DDRB/DDRD
WRITE DDRB/DDRD
WRITE PTB/PTD
READ PTB/PTD
COCO
BUS CLOCK
CONVERSION
COMPLETE
PTB0–PTB7 and PTD0–PTD3 are general-purpose I/O pins that are
shared with the ADC channels. The channel select bits (ADC status and
control register, $003C), define which ADC channel/port pin will be used
as the input signal. The ADC overrides the port I/O logic by forcing that
pin as input to the ADC. The remaining ADC channels/port pins are
controlled by the port I/O logic and can be used as general-purpose I/O.
RESET
Figure 11-2. ADC Block Diagram
Rev. 2.0
ADIV[2:0]
ADC DATA REGISTER
Analog-to-Digital Converter (ADC)
GENERATOR
CLOCK
ADC
ADC CLOCK
ADICLK
DDRBx/DDRDx
PTBx/PTDx
ADC VOLTAGE IN
ADCVIN
DISABLE
(1 OF 12 CHANNELS)
DISABLE
Analog-to-Digital Converter (ADC)
CHANNEL
SELECT
ADC CHANNEL x
ADCx
Functional Description
Technical Data
ADCH[4:0]
145

Related parts for MC68HC908JK3EMP