MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 182
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
(226 pages)
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Computer Operating Properly (COP)
15.4.5 Reset Vector Fetch
15.4.6 COPD (COP Disable)
15.4.7 COPRS (COP Rate Select)
Technical Data
182
Address:
Reset:
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the SIM counter.
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG). (See
Register
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register 1.
COPRS — COP Rate Select Bit
COPD — COP Disable Bit
Read:
Write:
COPRS selects the COP timeout period. Reset clears COPRS.
COPD disables the COP module.
1 = COP timeout period is (2
0 = COP timeout period is (2
1 = COP module disabled
0 = COP module enabled
COPRS
$001F
Bit 7
Figure 15-2. Configuration Register 1 (CONFIG1)
R
0
Computer Operating Properly (COP)
(CONFIG).)
= Reserved
R
6
0
R
5
0
LVID
4
0
13
18
MC68H(R)C908JL3E/JK3E/JK1E
– 2
– 2
Section 5. Configuration
4
4
) × 2OSCOUT cycles
) × 2OSCOUT cycles
R
3
0
SSREC
2
0
STOP
1
0
MOTOROLA
—
Rev. 2.0
COPD
Bit 0
0
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