HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 215
HD6412240
Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412240.pdf
(818 pages)
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If the BREQOE bit in BCRL is set to 1, when an internal bus master wants to make an external
access in the external bus released state, the BREQO pin is driven low and a request can be made
off-chip to drop the bus request.
When the BREQ pin is driven high, the BACK pin is driven high at the prescribed timing and the
external bus released state is terminated.
In the event of simultaneous external bus release request, and external access request generation,
the order of priority is as follows:
6.8.3
Table 6.6 shows pin states in the external bus released state.
Table 6.6
Pins
A
D
CSn
AS
RD
HWR
LWR
23
15
to A
to D
0
0
(High) External bus release > Internal bus master external access (Low)
Pin States in External Bus Released State
Pin States in Bus Released State
Pin State
High impedance
High impedance
High impedance
High impedance
High impedance
High impedance
High impedance
Rev.3.00 Mar. 26, 2007 Page 173 of 772
Section 6 Bus Controller
REJ09B0355-0300
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