HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 349

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

9.2.4
The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for
each channel. The TPU has three TIER registers, one for each channel. The TIER registers are
initialized to H'40 by a reset, and in hardware standby mode.
Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D
conversion start requests by TGRA input capture/compare match.
Bit 6—Reserved: Read-only bit, always read as 1.
Bit 7
TTGE
0
1
Channel 0: TIER0
Bit
Initial value
R/W
Channel 1: TIER1
Channel 2: TIER2
Bit
Initial value
R/W
Timer Interrupt Enable Register (TIER)
Description
A/D conversion start request generation disabled
A/D conversion start request generation enabled
:
:
:
:
:
:
TTGE
TTGE
R/W
R/W
7
0
7
0
—
—
—
—
6
1
6
1
TCIEU
R/W
—
—
5
0
5
0
TCIEV
TCIEV
R/W
R/W
4
0
4
0
Rev.3.00 Mar. 26, 2007 Page 307 of 772
Section 9 16-Bit Timer Pulse Unit (TPU)
TGIED
R/W
—
—
3
0
3
0
TGIEC
R/W
—
—
2
0
2
0
TGIEB
TGIEB
R/W
R/W
REJ09B0355-0300
1
0
1
0
(Initial value)
TGIEA
TGIEA
R/W
R/W
0
0
0
0