HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 495
HD6412240
Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412240.pdf
(818 pages)
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12.3.4
In clocked synchronous mode, data is transmitted or received in synchronization with clock
pulses, making it suitable for high-speed serial communication.
Inside the SCI, the transmitter and receiver are independent units, enabling full-duplex
communication by use of a common clock. Both the transmitter and the receiver also have a
double-buffered structure, so that data can be read or written during transmission or reception,
enabling continuous data transfer.
Figure 12.14 shows the general format for clocked synchronous serial communication.
In clocked synchronous serial communication, data on the transmission line is output from one
falling edge of the serial clock to the next. Data confirmation is guaranteed at the rising edge of
the serial clock.
In clocked serial communication, one character consists of data output starting with the LSB and
ending with the MSB. After the MSB is output, the transmission line holds the MSB state.
In clocked synchronous mode, the SCI receives data in synchronization with the rising edge of the
serial clock.
Data Transfer Format
A fixed 8-bit data format is used.
No parity or multiprocessor bits are added.
Serial
clock
Serial
data
Note: * High except in continuous transfer
Operation in Clocked Synchronous Mode
Don't care
*
Figure 12.14 Data Format in Synchronous Communication
LSB
Bit 0
Bit 1
One unit of transfer data (character or frame)
Bit 2
Bit 3
Section 12 Serial Communication Interface (SCI)
Bit 4
Rev.3.00 Mar. 26, 2007 Page 453 of 772
Bit 5
Bit 6
MSB
Bit 7
REJ09B0355-0300
Don't care
*
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