HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 67

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Exception Vector Table and Memory Indirect Branch Addresses: In advanced mode the top
area starting at H'00000000 is allocated to the exception vector table in units of 32 bits. In each 32
bits, the upper 8 bits are ignored and a branch address is stored in the lower 24 bits (figure 2.4).
For details of the exception vector table, see section 4, Exception Handling.
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses
an 8-bit absolute address included in the instruction code to specify a memory operand that
contains a branch address. In advanced mode the operand is a 32-bit longword operand, providing
a 32-bit branch address. The upper 8 bits of these 32 bits are a reserved area that is regarded as
H'00. Branch addresses can be stored in the area from H'00000000 to H'000000FF. Note that the
first part of this range is also the exception vector table.
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
H'0000000B
H'0000000C
H'00000010
Figure 2.4 Exception Vector Table (Advanced Mode)
Power-on reset exception vector
Manual reset exception vector
(Reserved for system use)
Exception vector 1
Reserved
Reserved
Reserved
Rev.3.00 Mar. 26, 2007 Page 25 of 772
Exception vector table
REJ09B0355-0300
Section 2 CPU