HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 362
HD6412240
Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412240.pdf
(818 pages)
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Section 9 16-Bit Timer Pulse Unit (TPU)
Phase Counting Mode
In this mode, TCNT is incremented or decremented by detecting the phases of two clocks input
from the external clock input pins in channels 1, and 2. When phase counting mode is set, the
corresponding TCLK pin functions as the clock pin, and TCNT performs up- or down-counting.
This can be used for two-phase encoder pulse input.
9.4.2
Counter Operation
When one of bits CST0 to CST2 is set to 1 in TSTR, the TCNT counter for the corresponding
channel starts counting. TCNT can operate as a free-running counter, periodic counter, and so on.
Example of count operation setting procedure: Figure 9.6 shows an example of the count
operation setting procedure.
Rev.3.00 Mar. 26, 2007 Page 320 of 772
REJ09B0355-0300
Select output compare register
Select counter clearing source
Basic Functions
Start count operation
Select counter clock
Operation selection
<Periodic counter>
Periodic counter
Set period
Figure 9.6 Example of Counter Operation Setting Procedure
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count operation
[5]
[1]
[2]
[3]
[4]
[5]
Select the counter
clock with bits
TPSC2 to TPSC0 in
TCR. At the same
time, select the
input clock edge
with bits CKEG1
and CKEG0 in
TCR.
For periodic counter
operation, select
the TGR to be used
as the TCNT
clearing source with
bits CCLR2 to
CCLR0 in TCR.
Designate the TGR
selected in [2] as an
output compare
register by means
of TIOR.
Set the periodic
counter cycle in the
TGR selected in [2].
Set the CST bit in
TSTR to 1 to start
the count operation.
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