HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 760
HD6412240
Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412240.pdf
(818 pages)
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Appendix B Register Field
TCR1—Timer Control Register 1
Bit
Initial value
Read/Write
Rev.3.00 Mar. 26, 2007 Page 718 of 772
REJ09B0355-0300
:
:
:
—
—
7
0
Counter Clear
0
1
CCLR1
R/W
0
1
0
1
6
0
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation
CCLR0
R/W
5
0
CKEG1
Note: This setting is ignored when channel 1
Clock Edge
R/W
4
0
0
1
is in phase counting mode.
—
0
1
CKEG0
R/W
Count at rising edge
Count at falling edge
Count at both edges
3
0
Note: This setting is ignored when channel 1 is in phase
Time Prescaler
H'FFE0
0
1
0
1
0
1
counting mode.
TPSC2
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock: counts on /1
Internal clock: counts on /4
Internal clock: counts on /16
Internal clock: counts on /64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Internal clock: counts on /256
Setting prohibited
TPSC1
R/W
1
0
TPSC0
R/W
0
0
TPU1
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