HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 239

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.3.7
In block transfer mode, one operation transfers one block of data. A block area is specified for
either the transfer source or the transfer destination.
The block size is 1 to 256. When the transfer of one block ends, the initial state of the block size
counter and the address register specified as the block area is restored. The other address register
is then incremented, decremented, or left fixed.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have ended, a
CPU interrupt is requested.
Table 7.7 lists the register information in block transfer mode and figure 7.8 shows memory
mapping in block transfer mode.
Table 7.7
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Block Transfer Mode
Register Information in Block Transfer Mode
Abbreviation
SAR
DAR
CRAL
CRB
CRAH
Rev.3.00 Mar. 26, 2007 Page 197 of 772
Function
Designates source address
Designates destination address
Holds block size
Block size count
Transfer count
Section 7 Data Transfer Controller
REJ09B0355-0300