HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 147
HD6417034B
Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417034B.pdf
(687 pages)
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8.2.7
The refresh timer control/status register (RTCSR) is a 16-bit read/write register that selects the
clock input to the refresh timer counter (RTCNT) and controls compare match interrupts (CMI). It
is initialized to H'0000 by a power-on reset, but is not initialized by a manual reset or in standby
mode.
To prevent RTCSR from being written incorrectly, it must be written by a different method from
most other registers. A word transfer operation is used, H'A5 is written in the upper byte, and the
actual data is written in the lower byte. For details, see section 8.2.11, Notes on Register Access.
Bits 15–8—Reserved: These bits are always read as 0.
Bit 7—Compare Match Flag (CMF): Indicates whether the values of RTCNT and the refresh
time constant register (RTCOR) match. When 0, the value of RTCNT and RTCOR do not match;
when 1, the value of RTCNT and RTCOR match.
Bit 7: CMF
0
1
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Refresh Timer Control/Status Register (RTCSR)
Description
RTCNT value does not equal RTCOR value
To clear CMF, the CPU must read CMF after it has been set to 1, then write a 0
in this bit
RTCNT value is equal to RTCOR value
CMF
R/W
15
—
—
0
7
0
CMIE
R/W
14
—
—
0
6
0
CKS2
R/W
13
—
—
0
5
0
CKS1
R/W
12
—
—
0
4
0
Rev. 7.00 Jan 31, 2006 page 121 of 658
Section 8 Bus State Controller (BSC)
CKS0
R/W
11
—
—
0
3
0
10
—
—
—
—
0
2
0
REJ09B0272-0700
—
—
—
—
9
0
1
0
(Initial value)
—
—
—
—
8
0
0
0
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