HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 376

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HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 12 Watchdog Timer (WDT)
12.4
12.4.1
If a timer counter clock pulse is generated during the T3 state of a write cycle to TCNT, the write
takes priority and the timer counter is not incremented (figure 12.8).
12.4.2
If the values of bits CKS2–CKS0 are altered while the WDT is running, the count may increment
incorrectly. Always stop the watchdog timer (by clearing the TME bit to 0) before changing the
values of bits CKS2–CKS0.
12.4.3
To prevent incorrect operation, always stop the watchdog timer (by clearing the TME bit to 0)
before switching between interval timer mode and watchdog timer mode.
Rev. 7.00 Jan 31, 2006 page 350 of 658
REJ09B0272-0700
Usage Notes
TCNT Write and Increment Contention
Changing CKS2–CKS0 Bit Values
Changing Watchdog Timer/Interval Timer Modes
write signal
input clock
Address
Internal
Figure 12.8 Contention between TCNT Write and Increment
TCNT
TCNT
CK
T1
TCNT write cycle
TCNT address
N
T2
Counter write data
T3
M

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