HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 292
HD6417034B
Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417034B.pdf
(687 pages)
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Section 10 16-Bit Integrated Timer Pulse Unit (ITU)
10.4.3
In synchronizing mode, two or more timer counters can be rewritten simultaneously (synchronized
preset). Multiple timer counters can also be cleared simultaneously using TCR settings
(synchronized clear). Synchronizing mode enables the general registers to be incremented with a
single time base. All five channels can be set for synchronous operation.
Procedure for Selecting Synchronizing Mode (figure 10.26):
Rev. 7.00 Jan 31, 2006 page 266 of 658
REJ09B0272-0700
1. Set 1 in the SYNC bit of the timer synchro register (TSNC) to use the channels in the
2. When a value is written in TCNT in any of the synchronized channels, the same value is
3. Set the counter to clear with compare match/input capture using bits CCLR1 and CCLR0 in
4. Set the counter clear source to synchronized clear using the CCLR1 and CCLR0 bits.
5. Set the STR bits in TSTR to 1 to start the TCNT count.
Set synchronizing mode
Synchronizing preset
synchronizing mode.
simultaneously written in TCNT in the other channels.
TCR.
Select synchronizing
Synchronized preset
Synchronizing Mode
Set TCNT
mode
Figure 10.26 Procedure for Selecting Synchronizing Mode
(2)
(1)
Synchronized clear
generated clear
Select counter
Counter clear
Start counting
Channel that
clear source
source?
Yes
No
(3)
(5)
Synchronized clear
Select counter
Start counting
clear source
(4)
(5)
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