HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 370

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HD6417034B

Manufacturer Part Number
HD6417034B
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 12 Watchdog Timer (WDT)
Note: * Only 0 can be written in bit 7, to clear the flag.
Bit 7—Watchdog Timer Overflow (WOVF): WOVF indicates that TCNT has overflowed (from
H'FF to H'00) in watchdog timer mode. It is not set in interval timer mode.
Bit 7: WOVF
0
1
Bit 6—Reset Enable (RSTE): RSTE selects whether to reset the chip internally if the TCNT
overflows in watchdog timer mode.
Bit 6: RSTE
0
1
Bit 5—Reset Select (RSTS): RSTS selects the type of internal reset generated if TCNT overflows
in watchdog timer mode.
Bit 5: RSTS
0
1
Bits 4–0—Reserved: These bits are always read as 1. The write value should always be 1.
12.2.4
The watchdog timer’s TCNT, TCSR, and RSTCSR registers differ from other registers in that they
are more difficult to write. The procedures for writing and reading these registers are given below.
Writing to TCNT and TCSR: These registers must be written by a word transfer instruction.
They cannot be written by byte transfer instructions. TCNT and TCSR both have the same write
Rev. 7.00 Jan 31, 2006 page 344 of 658
REJ09B0272-0700
Bit
Initial value
Read/Write
Notes on Register Access
Description
No TCNT overflow in watchdog timer mode
Cleared when software reads WOVF, then writes 0 in WOVF
Set by TCNT overflow in watchdog timer mode
Description
Not reset when TCNT overflows
LSI not reset internally, but TCNT and TCSR reset within WDT.
Reset when TCNT overflows
Description
Power-on reset
Manual reset
WOVF
R/(W)*
7
0
RSTE
R/W
6
0
RSTS
R/W
5
0
4
1
3
1
2
1
1
1
(Initial value)
(Initial value)
(Initial value)
0
1

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