HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 173

• Manufacturer Part Number: HD6417034B
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

For example, when MXC1 and MXC0 are set to 00 and an 8-bit shift is selected, the A23–A8
address bit values are output to pins A15–A0 the row address. The values for A21–A16 are
undefined. The values of bits address A21–A0 are output to pins A21–A0 as the column address.
Figure 8.16 depicts address multiplexing with an 8-bit shift.
8.5.2
There are two types of DRAM accesses: short pitch and long pitch. Short pitch or long pitch can
be selected for the respective bus cycles using the RW1 and WW1 bits in WCR1 and the DRW1
and DWW1 bits in WCR2. When the corresponding bits are cleared to 0, DRAM access is short
pitch and column address output occurs in 1 state. When these bits are 1, DRAM access is long
pitch and column address output occurs in 2 states. Figure 8.17 shows short pitch timing; figure
8.18 shows long pitch timing.
The high-level duty of the CAS signal can also be selected between 50% and 35% of the T
when access is short pitch. By setting the CDTY bit to 1, the high level duty becomes 35% and the
DRAM access time can be lengthened. Only set to 1 when the operating frequency is a minimum
of 10 MHz.
Basic Timing
Internal address
Internal address
Address pin
Address pin
RAS = Low
CAS = Low
Figure 8.16 Address Multiplexing States (8-Bit Shift)
A23
A23 A22 A21
Undefined output
A21
A21
A16 A15
Rev. 7.00 Jan 31, 2006 page 147 of 658
Section 8 Bus State Controller (BSC)
A8 A7
REJ09B0272-0700
A0
A0
A0
A0
c
state