HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 59

• Manufacturer Part Number: HD6417034B
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

The following tables (arranged by instruction classification) show instruction codes, operations,
and execution states, using the format shown below.
Table 2.11 Instruction Code Format
Item
Instruction
mnemonic
Instruction
code
Operation
summary
Execution
cycle
T bit
Notes: * Scaling (×1, ×2, ×4) is performed based on the operand size of the instruction.
Format
OP.Sz
MSB
(xx)
M/Q/T
&
|
^
~
<<n, >>n
—
,
LSB
SRC,DEST OP: Operation code
Explanation
Sz: Size
SRC: Source
DEST: Destination
Rm: Source register
Rn: Destination register
imm: Immediate data
disp: Displacement *
mmmm: Source register
nnnn: Destination register
iiii: Immediate data
dddd: Displacement
Direction of transfer
Memory operand
Flag bits in SR
Logical AND of each bit
Logical OR of each bit
Exclusive OR of each bit
Logical NOT of each bit
n-bit shift
Value when no wait states are inserted
Instruction execution cycles: The execution cycles shown
in the table are minimums. The actual number of cycles
may be increased:
1. When contention occurs between instruction fetches and
2. When the destination register of the load instruction
Value of T bit after instruction is executed
No change
data access, or
(memory
instruction are the same.
0000: R0
0001: R1
1111: R15
...........
register) and the register used by the next
Rev. 7.00 Jan 31, 2006 page 33 of 658
REJ09B0272-0700
Section 2 CPU