HD6417034B RENESAS [Renesas Technology Corp], HD6417034B Datasheet - Page 198

• Manufacturer Part Number: HD6417034B
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 8 Bus State Controller (BSC)
8.11
8.11.1
Condition: When DRAM (long-pitch mode) is used and a manual reset is performed.
Rev. 7.00 Jan 31, 2006 page 172 of 658
REJ09B0272-0700
c. Latching the BACK signal by using a flip-flop or triggering the flip-flop may or may not be
For example, adding a capacitance of 220 pF can raise the minimum voltage of the spike
above 2.0 V.
Note that delay of the BACK signal increases in units of approximately 0.1 ns/pF. (When a
capacitance of 220 pF is added, the delay increases by approximately 22 ns.)
successful due to the narrow pulse width of the spike. Implement a circuit configuration
which will cause no problems when latching BACK or using BACK as a trigger signal.
When splitting the BACK signal into two signals and latching each of them using a flip-
flop or triggering the flip-flop, the flip-flop may operate for one signal but not for the other.
To capture the BACK signal using a flip-flop, receive the BACK signal using a single flip-
flop then distribute the signal (see figure below).
Usage Notes
Usage Notes on Manual Reset
BACK
Circuit with capacitor for eliminating spikes
Trigger OK
Trigger NG
Microcomputer
D Q
D Q
SuperH
Q
Q
BACK
C
BACK
D Q
Q