MCIMX6D7CVT08AC Freescale Semiconductor, MCIMX6D7CVT08AC Datasheet - Page 20

• Manufacturer Part Number: MCIMX6D7CVT08AC
• Description: Processors - Application Specialized i.MX6D
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6D7CVT08AC

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: FCBGA
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Run mode: LDO
enabled
Run mode: LDO
bypassed
Standby/DSM Mode
VDD_HIGH internal
Regulator
Backup battery supply
range
USB supply voltages
DDR I/O supply
Supply for RGMII I/O
power group
Electrical Characteristics
4.1.3
Table 6
20
Description
Parameter
provides the operating ranges of the i.MX 6Dual/6Quad processors.
6
Operating Ranges
VDD_ARM23_IN
VDD_ARM23_IN
VDD_ARM23_IN
USB_OTG_VBUS
i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 2
VDD_SNVS_IN
VDD_HIGH_IN
USB_H1_VBUS
VDD_SOC_IN
VDD_SOC_IN
VDD_ARM_IN
VDD_ARM_IN
VDD_ARM_IN
VDD_SOC_IN
NVCC_DRAM
NVCC_RGMII
Symbol
3
5
5
5
2
2
2
1.350
1.275
1.275
1.225
1.225
1.125
0.925
1.425
1.283
1.05
1.15
1.14
1.15
Min
0.9
4.4
Table 6. Operating Ranges
0.9
2.8
2.8
4.4
3
3,4
3,6
6
3
6
1.35
Typ
1.2
1.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.575
2.625
Max
5.25
5.25
1.45
1.3
1.5
1.5
1.5
1.5
1.3
1.3
1.3
1.3
1.3
1.3
1.3
3.3
3.3
1
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
LDO Output Set Point (VDD_ARM_CAP
1.150 V minimum for operation up to 792 MHz.
LDO Output Set Point (VDD_ARM_CAP
0.925 V minimum for operation up to 396 MHz.
264 MHz < VPU  352 MHz; VDDSOC and
VDDPU LDO outputs (VDD_SOC_CAP and
VDD_PU_CAP) require 1.225 V minimum.
VPU  264 MHz; VDDSOC and VDDPU LDO
outputs (VDD_SOC_CAP and VDD_PU_CAP)
require 1.15 V minimum.
LDO bypassed for operation up to 852 MHz or
996 MHz (depending on the device speed
grade).
LDO bypassed for operation up to 792 MHz.
LDO bypassed for operation up to 396 MHz.
264 MHz < VPU  352 MHz
VPU  264 MHz
See
Consumption," on page
Must match the range of voltages that the
rechargeable backup battery supports.
Should be supplied from the same supply as
VDD_HIGH_IN, if the system does not require
keeping real time and other data on OFF state.
LPDDR2
DDR3
DDR3_L
• 1.15 V – 1.30 V in HSIC 1.2 V mode
• 1.43 V – 1.58 V in RGMII 1.5 V mode
• 1.70 V – 1.90 V in RGMII 1.8 V mode
• 2.25 V – 2.625 V in RGMII 2.5 V mode
Table 10, "Stop Mode Current and Power
Comment
Freescale Semiconductor
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25.
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