MCIMX6D7CVT08AC Freescale Semiconductor, MCIMX6D7CVT08AC Datasheet - Page 37

• Manufacturer Part Number: MCIMX6D7CVT08AC
• Description: Processors - Application Specialized i.MX6D
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6D7CVT08AC

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: FCBGA
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

1
2
3
4
4.6.3
The DDR I/O pads support LPDDR2 and DDR3/DDR3L operational modes.
4.6.3.1
The LPDDR2 interface mode fully complies with JESD209-2B LPDDR2 JEDEC standard release June,
2009. The parameters in
noted.
Freescale Semiconductor
Schmitt trigger VT–
Input current (no pull-up/down)
Input current (22 k pull-up)
Input current (47 k pull-up)
Input current (100 k pull-up)
Input current (100 k pull-down)
Keeper circuit resistance
High-level output voltage
Low-level output voltage
Input reference voltage
DC input High Voltage
DC input Low Voltage
Differential Input Logic High
Differential Input Logic Low
Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other methods.
Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
DSE is the Drive Strength Field setting in the associated IOMUX control register.
To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, Vil or Vih. Monotonic input transition time is from 0.1 ns to 1 s.
Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.
Parameter
DDR I/O DC Parameters
LPDDR2 Mode I/O DC Parameters
Parameters
3, 4
i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 2
Table 23
Symbol
Table 23. LPDDR2 I/O DC Electrical Parameters
Rkeep
Table 22. GPIO I/O DC Parameters (continued)
VT–
Iin
Iin
Iin
Iin
Iin
are guaranteed per the operating ranges in
Symbol
Vih(diff)
Vih(dc)
Vil(diff)
Vil(dc)
Vref
Voh
Vol
Vin = 0.3 x OVDD
Vin = 0.7 x OVDD
Test Conditions
Vin = OVDD or 0
Vin = OVDD
Vin = OVDD
Vin = OVDD
Test Conditions
Vin= OVDD
Vin = 0 V
Vin = 0 V
Vin = 0 V
Vin = 0 V
Ioh = -0.1 mA
Iol = 0.1 mA
—
—
—
—
—
—
0.49  OVDD
0.9  OVDD
Vref+0.13V
See Note
OVSS
0.26
Min
—
1
Table
2
Min
105
—
—
—
—
—
-1
Electrical Characteristics
6, unless otherwise
0.51  OVDD
0.1  OVDD
See Note
Vref-0.13V
OVDD
-0.26
Max
0.5
—

Max
212
100
175
48
48
1
1
1
1
1
OVDD
2
Unit
—
—
V
V
V
V
Unit
A
A
A
A
A
k
V
37