MCIMX6D7CVT08AC Freescale Semiconductor, MCIMX6D7CVT08AC Datasheet - Page 83

• Manufacturer Part Number: MCIMX6D7CVT08AC
• Description: Processors - Application Specialized i.MX6D
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6D7CVT08AC

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: FCBGA
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

4.11.5.1.2
The transmitter functions correctly up to an ENET_TX_CLK maximum frequency of 25 MHz + 1%.
There is no minimum frequency requirement. Additionally, the processor clock frequency must exceed
twice the ENET_TX_CLK frequency.
Figure 47
in the figure.
1
4.11.5.1.3
Figure 48
the figure.
Freescale Semiconductor
ENET_TX_EN, ENET_TX_CLK, and ENET0_TXD0 have the same timing in 10-Mbps 7-wire interface mode.
M5
M6
M7
M8
ID
ENET_TX_DATA3,2,1,0
ENET_TX_CLK (input)
ENET_CRS, ENET_COL
shows MII asynchronous input timings.
shows MII transmit signal timings.
ENET_TX_CLK to ENET_TX_DATA3,2,1,0, ENET_TX_EN,
ENET_TX_ER invalid
ENET_TX_CLK to ENET_TX_DATA3,2,1,0, ENET_TX_EN,
ENET_TX_ER valid
ENET_TX_CLK pulse width high
ENET_TX_CLK pulse width low
ENET_TX_EN
ENET_TX_ER
MII Transmit Signal Timing (ENET_TX_DATA3,2,1,0, ENET_TX_EN,
ENET_TX_ER, and ENET_TX_CLK)
MII Asynchronous Inputs Signal Timing (ENET_CRS and ENET_COL)
(outputs)
i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 2
Figure 47. MII Transmit Signal Timing Diagram
Characteristic
Figure 48. MII Async Inputs Timing Diagram
Table 55. MII Transmit Signal Timing
1
M5
Table 55
M6
Table 56
M7
describes the timing parameters (M5–M8) shown
describes the timing parameter (M9) shown in
M9
35%
35%
Min
—
5
M8
Max
65%
65%
20
—
ENET_TX_CLK period
ENET_TX_CLK period
Electrical Characteristics
Unit
ns
ns
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