MCIMX6D7CVT08AC Freescale Semiconductor, MCIMX6D7CVT08AC Datasheet - Page 6

• Manufacturer Part Number: MCIMX6D7CVT08AC
• Description: Processors - Application Specialized i.MX6D
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6D7CVT08AC

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: FCBGA
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Introduction
The i.MX 6Dual/6Quad processors integrate advanced power management unit and controllers:
The i.MX 6Dual/6Quad processors use dedicated hardware accelerators to meet the targeted multimedia
performance. The use of hardware accelerators is a key factor in obtaining high performance at low power
consumption numbers, while having the CPU core relatively free for performing other tasks.
The i.MX 6Dual/6Quad processors incorporate the following hardware accelerators:
Security functions are enabled and accelerated by the following hardware:
1. The theoretical maximum performance of 1 Gbps ENET is limited to 470 Mbps (total for Tx and Rx) due to internal bus
throughput limitations. The actual measured performance in optimized environment is up to 400 Mbps. For details, see the
ERR004512 erratum in the i.MX 6Dual/6Quad errata document (IMX6DQCE).
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— System JTAG Controller (SJC)
— GPIO with interrupt capabilities
— 8x8 Key Pad Port (KPP)
— Sony Philips Digital Interconnect Format (SPDIF), Rx and Tx
— Two Controller Area Network (FlexCAN), 1 Mbps each
— Two Watchdog timers (WDOG)
— Audio MUX (AUDMUX)
Provide PMU, including LDO supplies, for on-chip resources
Use Temperature Sensor for monitoring the die temperature
Support DVFS techniques for low power modes
Use Software State Retention and Power Gating for ARM and MPE
Support various levels of system power modes
Use flexible clock gating control scheme
VPU—Video Processing Unit
IPUv3H—Image Processing Unit version 3H (2 IPUs)
GPU3Dv4—3D Graphics Processing Unit (OpenGL ES 2.0) version 4
GPU2Dv2—2D Graphics Processing Unit (BitBlt)
GPUVG—OpenVG 1.1 Graphics Processing Unit
ASRC—Asynchronous Sample Rate Converter
ARM TrustZone including the TZ architecture (separation of interrupts, memory mapping, etc.)
SJC—System JTAG Controller. Protecting JTAG from debug port attacks by regulating or
blocking the access to the system debug features.
CAAM—Cryptographic Acceleration and Assurance Module, containing 16 KB secure RAM and
True and Pseudo Random Number Generator (NIST certified)
SNVS—Secure Non-Volatile Storage, including Secure Real Time Clock
CSU—Central Security Unit. Enhancement for the IC Identification Module (IIM). Will be
configured during boot and by eFUSEs and will determine the security level operation mode as
well as the TZ policy.
A-HAB—Advanced High Assurance Boot—HABv4 with the new embedded enhancements:
SHA-256, 2048-bit RSA key, version control mechanism, warm boot, CSU, and TZ initialization.
i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 2
Freescale Semiconductor