MCIMX6D7CVT08AC Freescale Semiconductor, MCIMX6D7CVT08AC Datasheet - Page 30

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MCIMX6D7CVT08AC

Manufacturer Part Number
MCIMX6D7CVT08AC
Description
Processors - Application Specialized i.MX6D
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6D7CVT08AC

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Data Ram Size
16 KB
Maximum Operating Temperature
+ 105
Mounting Style
SMD/SMT
Package / Case
FCBGA
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2

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Electrical Characteristics
4.2
The system design must comply with power-up sequence, power-down sequence, and steady state
guidelines as described in this section to ensure the reliable operation of the device. Any deviation from
these sequences may result in the following situations:
4.2.1
For power-up sequence, the restrictions are as follows:
30
Excessive current during power-up phase
Prevention of the device from booting
Irreversible damage to the processor
VDD_SNVS_IN supply must be turned ON before any other power supply. It may be connected
(shorted) with VDD_HIGH_IN supply.
If a coin cell is used to power VDD_SNVS_IN, then ensure that it is connected before any other
supply is switched on.
If the external SRC_POR_B signal is used to control the processor POR, SRC_POR_B must
remain low (asserted) until the VDD_ARM_CAP and VDD_SOC_CAP supplies are stable.
VDD_ARM_IN and VDD_SOC_IN may be applied in either order with no restrictions.
If the external SRC_POR_B signal is not used (always held high or left unconnected), the
processor defaults to the internal POR function (where the PMU controls generation of the POR
based on the power supplies). If the internal POR function is used, the following power supply
requirements must be met:
— VDD_ARM_IN and VDD_SOC_IN may be supplied from the same source, or
— VDD_SOC_IN can be supplied before VDD_ARM_IN with a maximum delay of 1 ms.
Power Supplies Requirements and Restrictions
Power-Up Sequence
The SRC_POR_B input (if used) must be immediately asserted at power-up
and remain asserted until the last power rail reaches its working voltage. In
the absence of an external reset feeding the SRC_POR_B input, the internal
POR module takes control. See the i.MX 6Dual/6Quad reference manual
(IMX6DQRM) for further details and to ensure that all necessary
requirements are being met.
Ensure that there is no back voltage (leakage) from any supply on the board
towards the 3.3 V supply (for example, from the external components that
use both the 1.8 V and 3.3 V supplies).
USB_OTG_VBUS and USB_H1_VBUS are not part of the power supply
sequence and can be powered at any time.
i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 2
NOTE
NOTE
NOTE
Freescale Semiconductor

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