MT48LC8M16A2P-75:G Micron Technology Inc, MT48LC8M16A2P-75:G Datasheet - Page 51

• Manufacturer Part Number: MT48LC8M16A2P-75:G
• Description: IC SDRAM 128MBIT 133MHZ 54TSOP
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC8M16A2P-75:G

• Memory Type: SDRAM
• Format - Memory: RAM
• Memory Size: 128M (8Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-TSOP II
• Memory Configuration: 16M X 8
• Access Time: 5.4ns
• Page Size: 128Mbit
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 150mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Table 18:
Notes
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
Parameter
DQM to data mask during WRITEs
DQM to data High-Z during READs
WRITE command to input data delay
Data-in to ACTIVE command
Data-in to PRECHARGE command
Last data-in to burst STOP command
Last data-in to new READ/WRITE command
Last data-in to PRECHARGE command
LMR command to ACTIVE or REFRESH command
Data-out to High-Z from PRECHARGE command
AC Functional Characteristics
Notes: 5, 6, 7, 8, 9, 11; notes appear on page 51
10.
11. AC timing and I
1. All voltages referenced to V
2. This parameter is sampled. V
3. I
4. Enables on-chip refresh and address counters.
5. The minimum specifications are used only to indicate cycle time at which proper
6. An initial pause of 100µs is required after power-up, followed by two AUTO REFRESH
7. AC characteristics assume
8. In addition to meeting the transition rate specification, the clock and CKE must tran-
9. Outputs measured at 1.5V with equivalent load:
biased at 1.4V.
with minimum cycle time and the outputs open.
operation over the full temperature range (0°C ≤ T
+85°C (industrial), and –40°C ≤ T
commands, before proper device operation is ensured. (V
ered up simultaneously. V
REFRESH command wake-ups should be repeated any time the
ment is exceeded.
sit between V
Q
t
a reference to V
High-Z.
crossover point. If the input transition time is longer than 1 ns, then the timing is ref-
erenced at V
should always be 1.5V referenced to crossover. Refer to Micron technical note
TN-48-09 for more details.
DD
HZ defines the time at which the output achieves the open circuit condition; it is not
is dependent on output loading and cycle rates. Specified values are obtained
IL
IH
(MAX) and V
OH
DD
50pF
and V
or V
tests have V
CL = 3
CL = 2
IL
OL
(or between V
. The last valid data element will meet
SS
t
51
SS
T = 1ns.
IH
and V
.
DD
Symbol
t
t
(MIN) and no longer at the 1.5V crossover point. CLK
ROH(3)
ROH(2)
t
t
IL
t
t
t
DQM
DWD
t
t
t
t
MRD
DQZ
DAL
DPL
BDL
CDL
RDL
, V
A
= 0V and V
≤
SS
DD
+105°C (automotive) ) is ensured.
Q must be at same potential.) The two AUTO
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Q = +3.3V; f = 1 MHz, T
IL
and V
-6A
0
2
0
5
2
1
1
2
2
3
–
IH
IH
= 3V, with timing referenced to 1.5V
) in a monotonic manner.
A
128Mb: x4, x8, x16 SDRAM
≤
-7E
0
2
0
4
2
1
1
2
2
3
2
+70°C (commercial), –40°C ≤ T
DD
©1999 Micron Technology, Inc. All rights reserved.
A
-75
and V
= 25°C; pin under test
0
2
0
5
2
1
1
2
2
3
2
t
OH before going
t
REF refresh require-
DD
Units
Q must be pow-
t
t
t
t
t
t
t
t
t
t
t
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
Notes
Notes
15, 21
16, 21
16, 21
17
17
17
17
17
26
17
17
A
≤