MT41J64M16LA-15E:B TR Micron Technology Inc, MT41J64M16LA-15E:B TR Datasheet - Page 104
![IC DDR3 SDRAM 1GBIT 96FBGA](/photos/7/23/72317/mfg557-60-fbga_sml.jpg)
MT41J64M16LA-15E:B TR
Manufacturer Part Number
MT41J64M16LA-15E:B TR
Description
IC DDR3 SDRAM 1GBIT 96FBGA
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Specifications of MT41J64M16LA-15E:B TR
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
1G (64M x 16)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
96-FBGA
Organization
64Mx16
Density
1Gb
Address Bus
16b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
355mA
Pin Count
96
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 104 of 181
- Download datasheet (9Mb)
Figure 49:
Write Leveling Mode Exit Procedure
PDF: 09005aef826aa906/Source: 09005aef82a357c3
1Gb_DDR3_4.fm - Rev. F 11/08 EN
Early remaining DQ
Late remaining DQ
Differential DQS 4
Prime DQ 5
Command
ODT
CK#
CK
Write Leveling Sequence
MRS 1
Notes:
t MOD
NOP 2
1. MRS: Load MR1 to enter write leveling mode.
2. NOP: NOP or DES.
3. DQS, DQS# needs to fulfill minimum pulse width requirements
4. Differential DQS is the differential data strobe (DQS, DQS#). Timing reference points are the
5. DRAM drives leveling feedback on a prime DQ (DQ0 for x4 and x8). The remaining DQ are
After the DRAM are leveled, they must exit from write leveling mode before the normal
mode can be used. Figure 50 on page 105 depicts a general procedure in exiting write
leveling mode. After the last rising DQS (capturing a “1” at T0), the memory controller
should stop driving the DQS signals after
the memory controller to capture the applicable prime DQ state (at ~Tb0). The DQ balls
become undefined when DQS no longer remains LOW, and they remain undefined until
t
The ODT input should be deasserted LOW such that ODTL off (MIN) expires after the
DQS is no longer driving LOW. When ODT LOW satisfies
~Tb0) until the DRAM is ready for either another rank to be leveled or until the normal
mode can be used. After DQS termination is switched off, write level mode should be
disabled via the MRS command (at Tc2). After
command may be registered by the DRAM. Some MRS commands may be issued after
t
MOD after the MRS command (at Te1).
MRD (at Td1).
t WLDQSEN
t
zero crossings. The solid line represents DQS; the dotted line represents DQS#.
driven low and remain in this state throughout the leveling procedure.
DQSL (MIN) as defined for regular writes. The maximum pulse width is system-dependent.
NOP
t WLMRD
NOP
t WLS
t DQSL 3
NOP
t WLH
104
T1
NOP
Indicates A Break in
Time Scale
t WLO
t WLO
t WLO
Micron Technology, Inc., reserves the right to change products or specifications without notice.
NOP
t
WLO (MAX) delay plus enough delay to enable
t DQSL 3
t
MOD is satisfied (at Te1), any valid
NOP
1Gb: x4, x8, x16 DDR3 SDRAM
t WLS
t WLH
Undefined Driving Mode
NOP
t
T2
IS, ODT must be kept LOW (at
t DQSH 3
t
©2006 Micron Technology, Inc. All rights reserved.
DQSH (MIN) and
NOP
t WLO
NOP
Commands
Don’t Care
NOP
Related parts for MT41J64M16LA-15E:B TR
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![MT41J64M16LA-187E:B TR](/photos/7/23/72317/mfg557-60-fbga_tmb.jpg)
Part Number:
Description:
IC DDR3 SDRAM 1GBIT 96FBGA
Manufacturer:
Micron Technology Inc
Datasheet:
![MT41J64M16LA-187E:B](/images/manufacturer_photos/0/4/441/micron_technology_inc_tmb.jpg)
Part Number:
Description:
Manufacturer:
Micron Technology Inc
Datasheet:
![MT41J64M16LA-15E:B](/images/manufacturer_photos/0/4/441/micron_technology_inc_tmb.jpg)
Part Number:
Description:
Manufacturer:
Micron Technology Inc
Datasheet:
![MT41J64M16LA-15E IT:B](/images/manufacturer_photos/0/4/441/micron_technology_inc_tmb.jpg)
Part Number:
Description:
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC8M8A2P-75:G](/photos/7/22/72261/557-54-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 64MBIT 133MHZ 54TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC2M32B2P-55:G](/photos/7/22/72264/557-86-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 64MBIT 5.5NS 86TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC2M32B2P-5:G](/photos/7/22/72264/557-86-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 64MBIT 200MHZ 86TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC16M4A2P-75:G](/photos/7/22/72261/557-54-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 64MBIT 133MHZ 54TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC8M16A2P-75:G](/photos/7/22/72261/557-54-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 128MBIT 133MHZ 54TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48H8M32LFB5-75:H](/images/manufacturer_photos/0/4/441/micron_technology_inc_tmb.jpg)
Part Number:
Description:
IC SDRAM 256MBIT 133MHZ 90VFBGA
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC16M8A2P-75:G](/photos/7/22/72261/557-54-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 128MBIT 133MHZ 54TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC32M8A2P-7E:D](/photos/7/22/72261/557-54-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 256MBIT 133MHZ 54TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT46V64M8P-6T:F](/photos/7/22/72288/mfg557-66-tsop_tmb.jpg)
Part Number:
Description:
IC DDR SDRAM 512MBIT 6NS 66TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC4M32B2P-6:G](/photos/7/22/72264/557-86-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 128MBIT 167MHZ 86TSOP
Manufacturer:
Micron Technology Inc
Datasheet:
![MT48LC4M32B2P-7:G](/photos/7/22/72264/557-86-tsop_tmb.jpg)
Part Number:
Description:
IC SDRAM 128MBIT 143MHZ 86TSOP
Manufacturer:
Micron Technology Inc
Datasheet: