MT41J64M16LA-15E:B TR Micron Technology Inc, MT41J64M16LA-15E:B TR Datasheet - Page 143
![IC DDR3 SDRAM 1GBIT 96FBGA](/photos/7/23/72317/mfg557-60-fbga_sml.jpg)
MT41J64M16LA-15E:B TR
Manufacturer Part Number
MT41J64M16LA-15E:B TR
Description
IC DDR3 SDRAM 1GBIT 96FBGA
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Specifications of MT41J64M16LA-15E:B TR
Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
1G (64M x 16)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
96-FBGA
Organization
64Mx16
Density
1Gb
Address Bus
16b
Maximum Clock Rate
1.333GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
355mA
Pin Count
96
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 89: Nonconsecutive WRITE to WRITE
Figure 90: WRITE (BL8) to READ (BL8)
DQS, DQS#
Command
Command 1
DQS, DQS#
Address
Address 3
CK#
DM
DQ
CK
DQ 4
CK#
CK
WRITE
Valid
T0
WRITE
Valid
T0
NOP
T1
Notes:
Notes:
NOP
T1
NOP
T2
1. DI n (or b) = data-in for column n (or column b).
2. Seven subsequent elements of data-in are applied in the programmed order following DO n.
3. Each WRITE command may be to any bank.
4. Shown for WL = 7 (CWL = 7, AL = 0).
1. NOP commands are shown for ease of illustration; other commands may be valid at these times.
2.
3. The BL8 setting is activated by either MR0[1:0] = 00 or MR0[1:0] = 01 and MR0[12] = 1 during the WRITE command at T0.
4. DI n = data-in for column n.
5. RL = 5 (AL = 0, CL = 5), WL = 5 (AL = 0, CWL = 5).
t
data shown at T9.
The READ command at Ta0 can be either BC4 or BL8, depending on MR0[1:0] and the A12 status at Ta0.
WTR controls the WRITE-to-READ delay to the same device and starts with the first rising clock edge after the last write
WL = CWL + AL = 7
NOP
NOP
T3
T2
WL = 5
T4
NOP
NOP
T3
WRITE
Valid
T5
NOP
T4
T6
NOP
t WPRE
NOP
NOP
T7
DI
T5
DI
n
n
n + 1
DI
n + 1
DI
WL = CWL + AL = 7
n + 2
T8
NOP
DI
n + 2
NOP
T6
DI
n + 3
DI
NOP
n + 4
T9
DI
n + 3
DI
n + 5
DI
n + 4
NOP
T7
DI
T10
NOP
n + 6
DI
n + 5
n + 7
DI
DI
NOP
T11
n + 6
NOP
T8
DI
n + 7
DI
T12
NOP
t WPST
DI
b
Indicates A Break in
Time Scale
NOP
b + 1
T9
DI
T13
NOP
b + 2
DI
b + 3
DI
NOP
T10
NOP
T14
b + 4
DI
t WTR 2
b + 5
DI
Transitioning Data
NOP
T15
b + 6
DI
NOP
Transitioning Data
T11
b + 7
DI
NOP
T16
READ
Valid
Ta0
Don’t Care
Don't Care
NOP
T17
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