MT41J256M8JE-15E:A Micron Technology Inc, MT41J256M8JE-15E:A Datasheet - Page 80

• Manufacturer Part Number: MT41J256M8JE-15E:A
• Description: IC DDR3 SDRAM 2GBIT 82FBGA
• Manufacturer: Micron Technology Inc
• Type: DDR3 SDRAMr

Specifications of MT41J256M8JE-15E:A

• Format - Memory: RAM
• Memory Type: DDR3 SDRAM
• Memory Size: 2G (256M x 8)
• Speed: 667MHz
• Interface: Parallel
• Voltage - Supply: 1.425 V ~ 1.575 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 82-FBGA
• Organization: 256Mx8
• Address Bus: 18b
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 56: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
Parameter
DQS, DQS# High-Z time (RL + BL/2)
DQS, DQS# differential READ preamble
DQS, DQS# differential READ postamble
DLL locking time
CTRL, CMD, ADDR
setup to CK,CK#
CTRL, CMD, ADDR
setup to CK,CK#
CTRL, CMD, ADDR hold
from CK,CK#
Minimum CTRL, CMD, ADDR pulse width
ACTIVATE to internal READ or WRITE delay
PRECHARGE command period
ACTIVATE-to-PRECHARGE command period
ACTIVATE-to-ACTIVATE command period
ACTIVATE-to-ACTIVATE
minimum command
period
Four ACTIVATE
windows
Write recovery time
Delay from start of internal WRITE
transaction to internal READ command
READ-to-PRECHARGE time
CAS#-to-CAS# command delay
Auto precharge write recovery + precharge
time
MODE REGISTER SET command cycle time
MODE REGISTER SET command update delay
Base (specification)
V
Base (specification)
V
Base (specification)
V
1KB page size
2KB page size
1KB page size
2KB page size
REF
REF
REF
@ 1 V/ns
@ 1 V/ns
@ 1 V/ns
t
Symbol
HZ (DQS)
AC175
AC150
DC100
t
t
t
t
t
t
t
t
t
t
t
RPRE
DLLK
t
t
t
MOD
RPST
FAW
t
WTR
MRD
IPW
RCD
RAS
t
RRD
CCD
DAL
t
RTP
t
WR
t
t
RP
RC
IH
IS
IS
Command and Address Timing
MIN = greater of
Min
512
200
375
350
500
275
375
900
0.9
0.3
4CK or 10ns
40
50
DDR3-800
MIN = greater of 4CK or 10ns
–
Note 24
Note 27
Max
400
–
–
–
–
–
–
–
–
–
–
MIN = greater of 12CK or 15ns; MAX = n/a
MIN = greater of 4CK or 7.5ns; MAX = n/a
MIN = greater of 4CK or 7.5ns; MAX = n/a
See Speed Bin Tables (page 74) for
See Speed Bin Tables (page 74) for
See Speed Bin Tables (page 74) for
See Speed Bin Tables (page 74) for
MIN = WR +
MIN = greater of
Min
37.5
512
125
300
275
425
200
300
780
0.9
0.3
4CK or 7.5ns
DDR3-1066
50
–
MIN = 15ns; MAX = n/a
MIN = 4CK; MAX = n/a
MIN = 4CK; MAX = n/a
Note 24
Note 27
Max
300
t
RP/
–
–
–
–
–
–
–
–
–
–
t
CK (AVG); MAX = n/a
MIN = greater of
Min
512
240
190
340
140
240
620
0.9
0.3
DDR3-1333
65
30
45
MIN = greater of 4CK or 7.5ns
4CK or 6ns
–
Note 24
Note 27
Max
250
–
–
–
–
–
–
–
–
–
–
t
t
RCD
t
RAS
t
RC
RP
MIN = greater of
Min
512
220
170
320
120
220
560
DDR3-1600
0.9
0.3
45
30
40
4CK or 6ns
–
Note 24
Note 27
Max
225
–
–
–
–
–
–
–
–
–
–
Units Notes
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
ps
ps
ps
ps
ps
ps
ps
ps
ns
ns
ns
ns
ns
ns
ns
31, 32,
22, 23
23, 24
23, 27
29, 30
20, 30
29, 30
20, 30
29, 30
20, 30
31, 32
31, 34
31, 32
28
41
31
31
31
31
31
31
31
33