Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 219
Manufacturer Part Number
ADAPTER ICE Z8 ENCORE 64K 64LQFP
Specifications of Z8F64220100ZDA
For Use With/related Products
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
On-Chip Debugger Control Register Definitions
Table 102. OCD Control Register (OCDCTL)
OCD Control Register
The OCD Control register
register enters or exits DEBUG mode and enables the BRK instruction.
A ‘reset and stop’ function can be achieved by writing
go’ function can be achieved by writing
mode, a ‘run’ function can be implemented by writing
Setting this bit to 1 causes the device to enter DEBUG mode. When in DEBUG mode, the
eZ8 CPU stops fetching new instructions. Clearing this bit causes the eZ8 CPU to start
running again. This bit is automatically set when a BRK instruction is decoded and Break-
points are enabled. If the Read Protect Option Bit is enabled, this bit can only be cleared
by resetting the device, it cannot be written to 0.
0 = TheZ8 Encore! XP
1 = The Z8 Encore! XP
This bit controls the behavior of the BRK instruction (opcode 00H). By default, Break-
points are disabled and the BRK instruction behaves like a NOP. If this bit is set to 1 and a
BRK instruction is decoded, the OCD takes action dependent upon the BRKLOOP bit.
0 = BRK instruction is disabled.
1 = BRK instruction is enabled.
This bit enables the debug acknowledge feature. If this bit is set to 1, then the OCD sends
an Debug Acknowledge character (
0 = Debug Acknowledge is disabled.
1 = Debug Acknowledge is enabled.
This bit determines what action the OCD takes when a BRK instruction is decoded if
breakpoints are enabled (BRKEN is 1). If this bit is 0, then the DBGMODE bit is automat-
ically set to 1 and the OCD entered DEBUG mode. If BRKLOOP is set to 1, then the
eZ8 CPU loops on the BRK instruction.
F64XX Series device is operating in NORMAL mode.
F64XX Series device is in DEBUG mode.
102) controls the state of the On-Chip Debugger. This
) to the host when a Breakpoint occurs.
to this register. If the device is in DEBUG
Z8 Encore! XP
to this register.
to this register. A ‘reset and