CP2400DK Silicon Laboratories Inc, CP2400DK Datasheet - Page 43
![KIT EVAL SPI LCD DRIVER CP2400](/photos/28/36/283674/cp2400dk_sml.jpg)
CP2400DK
Manufacturer Part Number
CP2400DK
Description
KIT EVAL SPI LCD DRIVER CP2400
Manufacturer
Silicon Laboratories Inc
Specifications of CP2400DK
Main Purpose
LCD Development
Embedded
Yes
Utilized Ic / Part
CP2400
Primary Attributes
I²C, SMBus Interfaces
Secondary Attributes
Up to 128 segments
Product
Microcontroller Modules
Core Processor
C8051F930
Clock Speed
20 MHz
Interface Type
SPI
Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Cpu Core
C8051F930
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1858
336-1858
336-1858
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SFR Definition 7.3. INT0EN: Interrupt Enable Register 0
Address = 0x30
Name
Reset
7:6
2:1
Bit
Type
5
4
3
0
Bit
ERTCFAIL Enable SmaRTClock Fail Interrupt.
Reserved Read = varies. Write = must write 0b.
EPMINT
Unused
EALRM
Unused
Name
R/W
7
1
Read = 11b. Write = don’t care.
Enable SmaRTClock Alarm Interrupt.
This bit sets the masking of the SmaRTClock Alarm interrupt.
0: Disable SmaRTClock Alarm interrupts.
1: Enable interrupt requests generated by SmaRTClock Alarm Events.
This bit sets the masking of the SmaRTClock Oscillator Fail interrupt.
0: Disable SmaRTClock Oscillator Fail interrupt.
1: Enable interrupt requests generated by SmaRTClock Oscillator Failure.
Read = 11b. Write = don’t care.
Enable Port Match Interrupt.
This bit sets the masking of Port Match Interrupt.
0: Disable Port Match Interrupt.
1: Enable interrupt requests generated by Port Match events.
R/W
6
1
Reserved
R/W
5
1
Rev. 1.0
EALRM
R/W
4
1
Function
ERTCFAIL
R/W
3
0
R/W
2
1
CP2400/1/2/3
R/W
1
1
EPMINT
R/W
0
1
43
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