CP2400DK Silicon Laboratories Inc, CP2400DK Datasheet - Page 59

KIT EVAL SPI LCD DRIVER CP2400

CP2400DK

Manufacturer Part Number
CP2400DK
Description
KIT EVAL SPI LCD DRIVER CP2400
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2400DK

Main Purpose
LCD Development
Embedded
Yes
Utilized Ic / Part
CP2400
Primary Attributes
I²C, SMBus Interfaces
Secondary Attributes
Up to 128 segments
Product
Microcontroller Modules
Core Processor
C8051F930
Clock Speed
20 MHz
Interface Type
SPI
Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Cpu Core
C8051F930
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1858
336-1858
SFR Definition 9.5. MSCF: Master Configuration Register
Address = 0xA1
Note: When the band gap is configured for low power mode with loose voltage regulation, the LCD0CF register should be
Name
Reset
7:6
5:1
Bit
Type
0
Bit
adjusted so that charge pump cycles occur at least once every 2 ms.
BGMD[1:0] Band Gap Power Mode.
Reserved
CPBYP
Name
R/W
7
0
BGMD[1:0]
00: Band Gap is in Normal Power Mode.
01: Reserved.
10: Band Gap is configured for low power with loose voltage regulation
(required setting for Shutdown Mode).
11: Band Gap is configured for low power with tight voltage regulation.
Read = Varies. Must write 00000b.
Charge Pump Bypass.
When set to 1, the charge pump is bypassed and disabled. VDD is used as the VLCD supply
voltage.
R/W
6
0
Reserved
R/W
5
0
Reserved
Rev. 1.0
R/W
4
0
Reserved
Function
R/W
3
0
Reserved
R/W
2
0
CP2400/1/2/3
Reserved
R/W
1
0
CPBYP
R/W
0
0
59

Related parts for CP2400DK