CP2400DK Silicon Laboratories Inc, CP2400DK Datasheet - Page 96

KIT EVAL SPI LCD DRIVER CP2400

CP2400DK

Manufacturer Part Number
CP2400DK
Description
KIT EVAL SPI LCD DRIVER CP2400
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2400DK

Main Purpose
LCD Development
Embedded
Yes
Utilized Ic / Part
CP2400
Primary Attributes
I²C, SMBus Interfaces
Secondary Attributes
Up to 128 segments
Product
Microcontroller Modules
Core Processor
C8051F930
Clock Speed
20 MHz
Interface Type
SPI
Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Cpu Core
C8051F930
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1858
336-1858
CP2400/1/2/3
13.2. Timer 1
Timer 1 is a 16-bit timer formed by two 8-bit SFRs: TMR1L (low byte) and TMR1H (high byte). Timer 1 operates in
16-bit auto-reload mode and is clocked by the system clock divided by 12 or SmaRTClock divided by 8. As the 16-
bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 1 reload registers
(TMR1RLH and TMR1RLL) is loaded into the Timer 1 register as shown in Figure 13.1, and the Timer 1 Overflow
Flag (INT1.3) is set. If Timer 1 interrupts are enabled (if IN1EN.3 is set), an interrupt will be generated on each
Timer 1 overflow. Additionally, if Timer 1 interrupts are enabled and the TF0LEN bit is set (TMR0CN.5), an interrupt
will be generated each time the lower 8 bits (TMR0L) overflow from 0xFF to 0x00.
96
SmaRTClock / 8
SYSCLK / 12
T1XCLK
0
1
TR1
Figure 13.2. Timer 1 Block Diagram
Rev. 1.0
TMR1RLL TMR1RLH
TMR1L
Low Byte
Overflow
TMR1H
Reload
To Interrupt
To CS0

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