STEVAL-IFW001V1 STMicroelectronics, STEVAL-IFW001V1 Datasheet - Page 47
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STEVAL-IFW001V1
Manufacturer Part Number
STEVAL-IFW001V1
Description
BOARD EVAL BASED ON STR912FA
Manufacturer
STMicroelectronics
Datasheets
1.STEVAL-IFW001V1.pdf
(102 pages)
2.STEVAL-IFW001V1.pdf
(9 pages)
3.STEVAL-IFW001V1.pdf
(7 pages)
Specifications of STEVAL-IFW001V1
Design Resources
STEVAL-IFW001V1 Gerber Files STEVAL-IFW001V1 Schematic STEVAL-IFW001V1 Bill of Material
Main Purpose
Interface, Ethernet
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
E-STE101P, STR912FAW44
Primary Attributes
Dual Ethernet Transceivers for Full Duplex Communication
Secondary Attributes
Up to 32 MII Addresses, UART, I2C, SPI, with RJ45 Connectors
Silicon Manufacturer
ST Micro
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
STR9
Silicon Family Name
STR91x
For Use With
497-8263 - BOARD EXTENSION STEVAL-IFW001V1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8262
STR91xFAxxx
Table 8.
21
22
23
29
7
8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Package
101
106
109
110
114
116
67
69
71
76
78
85
88
90
98
99
10
11
33
35
37
45
K10
H12
H10
E11
B12
B10
C10
L11
J11
F11
M1
B9
C8
B7
A7
F7
D6
E2
E3
K3
L4
J5
Device pin description
name
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Default pin
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
function
GPIO_0.0,
GPIO_0.1,
GPIO_0.2,
GPIO_0.3,
GPIO_0.4,
GPIO_0.5,
GPIO_0.6,
GPIO_0.7,
GPIO_1.0,
GPIO_1.1,
GPIO_1.2,
GPIO_1.3,
GPIO_1.4,
GPIO_1.5,
GPIO_1.6,
GPIO_1.7,
GPIO_2.0,
GPIO_2.1,
GPIO_2.2,
GPIO_2.3,
GPIO_2.4,
GPIO_2.5,
EXTCLK_T0T1E
EXTCLK_T2T3E
PHY carrier sns
Data Set Ready
PHY Xmit clock
Dat Carrier Det
PHY data valid
PHY Rx data0
Clear To Send
Ring Indicator
xt clk timer0/1
xt clk timer2/3
MII_TX_CLK,
MII_RX_CLK,
PHY Rx clock
PHY rcv error
UART0_CTS,
UART0_DSR,
UART0_DCD,
PHY collision
PHY Rx data
PHY Rx data
PHY Rx data
MII_RX_ER,
MII_RX_DV,
function
UART0_RI,
MII_RXD0,
MII_RXD1,
MII_RXD2,
MII_RXD3,
Default
MII_COL,
MII_CRS,
input
Doc ID 13495 Rev 6
-
-
-
-
-
-
SSP mstr data in
ETM ext. trigger
ETM ext. trigger
ETM_EXTRIG,
ETM_EXTRIG,
UART rcv data
UART rcv data
SSP slv dat in
TIM0_ICAP1,
Input Capture
TIM0_ICAP2,
Input Capture
TIM2_ICAP1,
Input Capture
TIM2_ICAP2,
Input Capture
CAN rcv data
SSP0_SCLK,
SSP slv clk in
SSP0_MOSI,
I2C0_CLKIN,
I2C1_CLKIN,
SSP1_MISO,
I2C0_CLKIN,
I2C0_CLKIN,
I2C1_CLKIN,
Alternate
UART1_RX,
UART2_RX,
I2C clock in
I2C clock in
I2C clock in
I2C clock in
I2C clock in
I2C data in
I2C data in
I2C data in
I2C data in
I2C data in
I2C0_DIN,
I2C1_DIN,
I2C0_DIN,
I2C0_DIN,
I2C1_DIN,
CAN_RX,
input 1
Alternate
output 1
GPIO_0.0,
GP Output
GPIO_0.1,
GP Output
GPIO_0.2,
GP Output
GPIO_0.3,
GP Output
GPIO_0.4,
GP Output
GPIO_0.5,
GP Output
GPIO_0.6,
GP Output
GPIO_0.7,
GP Output
GPIO_1.0,
GP Output
GPIO_1.1,
GP Output
GPIO_1.2,
GP Output
GPIO_1.3,
GP Output
GPIO_1.4,
GP Output
GPIO_1.5,
GP Output
GPIO_1.6,
GP Output
GPIO_1.7,
GP Output
GPIO_2.0,
GP Output
GPIO_2.1,
GP Output
GPIO_2.2,
GP Output
GPIO_2.3,
GP Output
GPIO_2.4,
GP Output
GPIO_2.5,
GP Output
Alternate functions
SSP mstr dat out
SSP mstr clk out
EMI Chip Select
EMI Chip Select
EMI Chip Select
EMI Chip Select
MAC mgt dat ck
UART xmit data
UART xmit data
I2C0_CLKOUT,
I2C1_CLKOUT,
I2C0_CLKOUT,
I2C1_CLKOUT,
SSP0_SCLK,
SSP0_MOSI,
I2C clock out
I2C clock out
MAC Tx data
MAC Tx data
MAC Tx data
MAC Tx data
CAN Tx data
I2C clock out
I2C clock out
Alternate
I2C0_DOUT,
I2C1_DOUT,
I2C0_DOUT,
I2C1_DOUT,
I2C data out
I2C data out
I2C data out
I2C data out
UART1_TX,
UART2_TX,
EMI_CS0n,
EMI_CS1n,
EMI_CS2n,
EMI_CS3n,
output 2
MII_TXD0,
MII_TXD1,
MII_TXD2,
MII_TXD3,
MII_MDC,
CAN_TX,
Pin description
SSP mstr dat out
SSP mstr sel out
SSP mstr clk out
ETM pipe status
ETM pipe status
ETM pipe status
ETM trace clock
ETM trace clock
ETM pipe status
ETM pipe status
ETM_TRSYNC,
UART xmit data
ETM trace sync
I2C0_CLKOUT,
ETM_PSTAT0,
ETM_PSTAT1,
ETM_PSTAT2,
ETM_PSTAT0,
ETM_PSTAT1,
ETM_TRCLK,
ETM_TRCLK,
SSP1_SCLK,
SSP1_MOSI,
I2C clock out
I2C0_DOUT,
Alternate
ETM_PCK0,
ETM_PCK1,
ETM_PCK2,
ETM_PCK3,
I2C data out
ETM_PCK0,
ETM_PCK1,
ETM_PCK2,
ETM_PCK3,
ETM Packet
ETM Packet
ETM Packet
ETM Packet
UART0_TX,
SSP1_NSS,
ETM Packet
ETM Packet
ETM Packet
ETM Packet
output 3
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