STEVAL-IFW001V1 STMicroelectronics, STEVAL-IFW001V1 Datasheet - Page 76
![BOARD EVAL BASED ON STR912FA](/photos/9/9/90953/steval-ifw001v1_sml.jpg)
STEVAL-IFW001V1
Manufacturer Part Number
STEVAL-IFW001V1
Description
BOARD EVAL BASED ON STR912FA
Manufacturer
STMicroelectronics
Datasheets
1.STEVAL-IFW001V1.pdf
(102 pages)
2.STEVAL-IFW001V1.pdf
(9 pages)
3.STEVAL-IFW001V1.pdf
(7 pages)
Specifications of STEVAL-IFW001V1
Design Resources
STEVAL-IFW001V1 Gerber Files STEVAL-IFW001V1 Schematic STEVAL-IFW001V1 Bill of Material
Main Purpose
Interface, Ethernet
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
E-STE101P, STR912FAW44
Primary Attributes
Dual Ethernet Transceivers for Full Duplex Communication
Secondary Attributes
Up to 32 MII Addresses, UART, I2C, SPI, with RJ45 Connectors
Silicon Manufacturer
ST Micro
Core Architecture
ARM
Core Sub-architecture
ARM9
Silicon Core Number
STR9
Silicon Family Name
STR91x
For Use With
497-8263 - BOARD EXTENSION STEVAL-IFW001V1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8262
- Current page: 76 of 102
- Download datasheet (3Mb)
Electrical characteristics
7.11
7.11.1
Table 33.
76/102
Symbol
t
t
t
WCR
WDS
t
WAS
WP
WRn to CSn
inactive
Write address setup
time
Write data setup
time
Write pulse width
EMI non-mux write operation
External memory bus timings
V
Table 32.
1. The internal EMI Bus clock signal is available externally only on LFBGA144 packages (ball M8), and not
2. EMI_ratio =1/ 2 by default (can be programmed to be 1 by setting the proper bits in the SCU_CLKCNTR
Asynchronous mode
Non Mux Write
Figure 18. Non-mux write timings
Parameter
DDQ
EMI_BWR_WRLn
EMI_CSxn
EMI_A[15:0]
available on LQFP packages.
register)
EMI_D[7:0]
= 2.7 - 3.6 V, V
Symbol
t
BCLK
EMI bus clock period
(WSTWR-WSTWEN + 1) x t
((WSTWEN + 1/2) x t
((WSTWEN + 1/2) x t
DD
= 1.65 - 2 V, T
(t
EMI bus clock period
BCLK
Doc ID 13495 Rev 6
Min
/2) - 2 ns
t
t
WDS
WAS
Parameter
A
BCLK
BCLK
= -40 / 85 °C, C
BCLK
) - 5 ns
) - 2 ns
Address
Data
- 1 ns (WSTWR-WSTWEN + 1) x t
(1)
Value
L
= 30 pF unless otherwise specified.
((WSTWEN + 1/2) x t
t
((WSTWEN + 1/2) x t
WP
(t
1 /(f
BCLK
HCLK
Max
/2) + 2 ns
Value
x EMI_ratio)
t
WCR
BCLK
STR91xFAxxx
(2)
BCLK
BCLK
) + 1 ns
)
+ 1.5 ns
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