OM11014 NXP Semiconductors, OM11014 Datasheet - Page 27

BOARD EVAL FOR LPC2919

OM11014

Manufacturer Part Number
OM11014
Description
BOARD EVAL FOR LPC2919
Manufacturer
NXP Semiconductors
Series
Keilr
Type
MCUr
Datasheet

Specifications of OM11014

Contents
Board, Cable, CD
For Use With/related Products
LPC2919
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
568-4360
NXP Semiconductors
LPC2917_19_1
Product data sheet
8.4.5.3 Modes of operation
8.4.5.4 SPI pin description
8.4.5.5 SPI clock description
Depending on the operating mode selected, the SPI_CS_OUT outputs operate as an
active-HIGH frame synchronization output for Texas Instruments synchronous serial
frame format or an active-LOW chip select for SPI.
Each data frame is between four and 16 bits long, depending on the size of words
programmed, and is transmitted starting with the MSB.
There are two basic frame types that can be selected:
The SPI module can operate in:
The three SPI modules in the LPC2917/19 have the pins listed below. The pins are
combined with other functions on the port pins of the LPC2917/19, see
Table 16
Table 16.
[1]
[2]
The SPI modules are clocked by two different clocks; CLK_SYS_PESS and CLK_SPIx
(x = 0-2), see
power management. The frequency of all clocks CLK_SPIx is identical as they are derived
from the same base clock BASE_CLK_SPI. The register interface towards the system bus
is clocked by CLK_SYS_PESS. The serial-clock rate divisor is clocked by CLK_SPIx.
The SPI clock frequency can be controlled by the CGU. In master mode the SPI clock
frequency (CLK_SPIx) must be set to at least twice the SPI serial clock rate on the
interface. In slave mode CLK_SPIx must be set to four times the SPI serial clock rate on
the interface.
Symbol
SPIx SCSy
SPIx SCK
SPIx SDI
SPIx SDO
Texas Instruments synchronous serial
Motorola Serial Peripheral Interface
Master mode:
– Normal transmission mode
– Sequential slave mode
Slave mode
Direction of SPIx SCS and SPIx SCK pins depends on master or slave mode. These pins are output in
master mode, input in slave mode.
In slave mode there is only one chip select input pin, SPIx SCS0. The other chip selects have no function in
slave mode.
shows the SPI pins (x runs from 0 to 2; y runs from 0 to 3).
SPI pins
Direction
IN/OUT
IN/OUT
IN
OUT
Section
7.2.2. Note that each SPI has its own CLK_SPIx branch clock for
Rev. 01 — 31 July 2008
Description
SPIx chip select
SPIx clock
SPIx data input
SPIx data output
[1]
[1][2]
ARM9 microcontroller with CAN and LIN
LPC2917/19
© NXP B.V. 2008. All rights reserved.
Section
8.3.3.
27 of 67

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