OM11014 NXP Semiconductors, OM11014 Datasheet - Page 39

BOARD EVAL FOR LPC2919

OM11014

Manufacturer Part Number
OM11014
Description
BOARD EVAL FOR LPC2919
Manufacturer
NXP Semiconductors
Series
Keilr
Type
MCUr
Datasheet

Specifications of OM11014

Contents
Board, Cable, CD
For Use With/related Products
LPC2919
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
568-4360
NXP Semiconductors
LPC2917_19_1
Product data sheet
8.7.7.2 Description
8.7.7.3 MSCSS timer-pin description
8.7.7.4 MSCSS timer-clock description
8.8.1 Overview
8.8.2 Description
8.8 Power, clock and reset control subsystem
See section
MSCSS timer 0 has no external pins.
MSCSS timer 1 has a PAUSE pin available as external pin. The PAUSE pin is combined
with other functions on the port pins of the LPC2917/19.
timer 1 external pin.
Table 22.
The Timer modules in the MSCSS are clocked by CLK_MSCSS_MTMRx (x = 0-1), see
Section
power management. The frequency of all these clocks is identical to CLK_MSCSS_APB
since they are derived from the same base clock BASE_MSCSS_CLK.
Note that, unlike the timer modules in the Peripheral SubSystem, the actual timer counter
registers run at the same clock as the APB system interface CLK_MSCSS_APB. This
clock is independent of the AHB system clock.
If a timer module is not used its CLK_MSCSS_MTMRx branch clock can be switched off.
The Power, Clock and Reset Control Subsystem (PCRSS) in the LPC2917/19 includes a
Clock Generation Unit (CGU), a Reset Generation Unit (RGU) and a Power Management
Unit (PMU).
Figure 11
communication with the AHB system bus.
Symbol
MSCSS PAUSE
7.2.2. Note that each timer has its own CLK_MSCSS_MTMRx branch clock for
provides an overview of the PCRSS. An AHB-to-DTL bridge takes care of
MSCSS timer 1 pin
Section 8.4.3.2
Direction
IN
Rev. 01 — 31 July 2008
for a description of the timers.
Description
pause pin for MSCSS timer 1
ARM9 microcontroller with CAN and LIN
Table 22
LPC2917/19
shows the MSCSS
© NXP B.V. 2008. All rights reserved.
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