OM11014 NXP Semiconductors, OM11014 Datasheet - Page 35

• Manufacturer Part Number: OM11014
• Description: BOARD EVAL FOR LPC2919
• Manufacturer: NXP Semiconductors
• Series: Keilr
• Type: MCUr

Specifications of OM11014

• Contents: Board, Cable, CD
• For Use With/related Products: LPC2919
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Other names: 568-4360

NXP Semiconductors
LPC2917_19_1
Product data sheet
Fig 9.
APB system bus
ADC block diagram
ADC IRQ
8.7.5.3 ADC pin description
8.7.5.4 ADC clock description
(MSCSS sub-system clock)
system-clock divider dedicated to the ADC clock. Conversion rate is determined by the
ADC clock frequency divided by the number of resolution bits plus one. Accessing ADC
registers requires an enabled ADC clock, which is controllable via the clock generation
unit, see
Each ADC has four start inputs. Note that start 0 and start 2 are captured in the system
clock domain while start 1 and start 3 are captured in the ADC domain. The start inputs
are connected at MSCSS level, see
The two ADC modules in the MSCSS have the pins described below. The ADCx input pins
are combined with other functions on the port pins of the LPC2917/19. The VREFN and
VREFP pins are common for both ADCs.
Table 20.
The ADC modules are clocked from two different sources; CLK_MSCSS_ADCx_APB and
CLK_ADCx (x = 1 or 2), see
and CLK_MSCSS_ADCx_APB branch clocks for power management. If an ADC is
unused both its CLK_MSCSS_ADCx_APB and CLK_ADCx can be switched off.
CLK_ADCx_APB
Symbol
ADCn IN[7:0]
ADCn_EXT_START
VREFN
VREFP
start 0
REGISTERS
CONTROL
ADC
AND
start 2
Section
APB SUB-SYSTEM
Analog to digital converter pins
configuration data
conversion data
DOMAIN
update
8.8.4.
IRQ
Direction
IN
IN
IN
IN
Rev. 01 — 31 July 2008
start 1
up to 4.5 MHz)
Section
REGISTERS
CLK_ADCx
(ADC clock
CONTROL
ADC
AND
Description
analog input for ADCn, channel 7 to channel 0 (n is 1 or 2)
ADC external start-trigger input (n is 1 or 2)
ADC LOW reference level
ADC HIGH reference level
start 3
Section 8.7.2.1
7.2.2. Note that each ADC has its own CLK_ADCx
Table 20
sync_out
ARM9 microcontroller with CAN and LIN
3.3 V
ADC
ADC DOMAIN
shows the ADC pins.
for details.
ANALOG
MUX
LPC2917/19
analog inputs
ADC1 IN[0:7]
ADC2 IN[0:7]
© NXP B.V. 2008. All rights reserved.
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