OM11014 NXP Semiconductors, OM11014 Datasheet - Page 30

BOARD EVAL FOR LPC2919

OM11014

Manufacturer Part Number
OM11014
Description
BOARD EVAL FOR LPC2919
Manufacturer
NXP Semiconductors
Series
Keilr
Type
MCUr
Datasheet

Specifications of OM11014

Contents
Board, Cable, CD
For Use With/related Products
LPC2919
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
568-4360
NXP Semiconductors
LPC2917_19_1
Product data sheet
8.6.2 LIN pin description
8.7.1 Overview
8.7.2 Description
8.7 Modulation and sampling control subsystem
The two LIN 2.0 master controllers in the LPC2917/19 have the pins listed below. The LIN
pins are combined with other functions on the port pins of the LPC2917/19.
shows the LIN pins. For more information see
controller.
Table 19.
The Modulation and Sampling Control Subsystem (MSCSS) in the LPC2917/19 includes
four Pulse-Width Modulators (PWMs), two 10-bit successive approximation
Analog-to-Digital Converters (ADCs) and two timers.
The key features of the MSCSS are:
The MSCSS contains Pulse-Width Modulators (PWMs), Analog-to-Digital Converters
(ADCs) and timers.
Figure 7
communication with the AHB system bus. Two internal timers are dedicated to this
subsystem. MSCSS timer 0 can be used to generate start pulses for the ADCs and the
first PWM. The second timer (MSCSS timer 1) is used to generate ‘carrier’ signals for the
PWMs. These carrier patterns can be used, for example, in applications requiring current
Symbol
LIN0/1 TXDL OUT
LIN0/1 RXDL IN
Complete LIN 2.0 message handling and transfer
One interrupt per LIN message
Slave response time-out detection
Programmable sync-break length
Automatic sync-field and sync-break generation
Programmable inter-byte space
Hardware or software parity generation
Automatic checksum generation
Fault confinement
Fractional baud rate generator
Two 10-bit, 400 ksample/s, 8-channel ADCs with 3.3 V inputs and various trigger-
start options
Four 6-channel PWMs (Pulse-Width Modulators) with capture and trap functionality
Two dedicated timers to schedule and synchronize the PWMs and ADCs
provides an overview of the MSCSS. An AHB-to-APB bus bridge takes care of
LIN controller pins
Direction
Rev. 01 — 31 July 2008
Description
LIN channel 0/1 transmit data output
LIN channel 0/1 receive data input
Ref. 1
ARM9 microcontroller with CAN and LIN
subsection 3.43, LIN master
LPC2917/19
© NXP B.V. 2008. All rights reserved.
Table 19
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