C8051F040-TB Silicon Laboratories Inc, C8051F040-TB Datasheet - Page 117

• Manufacturer Part Number: C8051F040-TB
• Description: BOARD PROTOTYPING W/C8051F040
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040-TB

• Contents: Board
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F040
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

10. Voltage Reference (C8051F041/3/5/7)
The internal voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier. The internal reference may be routed via the VREF pin
to external system components or to the VREFA input pin shown in Figure 10.1. Bypass capacitors of
0.1 µF and 4.7 µF are recommended from the VREF pin to AGND, as shown in Figure 10.1. See
Table 10.1 for voltage reference specifications.
The VREFA pin provides a voltage reference input for ADC0 and ADC2 (C8051F041/3 only). ADC0 may
also reference the DAC0 output internally (C8051F041/3 only), and ADC2 may reference the analog power
supply voltage, via the VREF multiplexers shown in Figure 10.1.
The Reference Control Register, REF0CN (defined in SFR Definition 10.1) enables/disables the internal
reference generator and selects the reference inputs for ADC0 and ADC2. The BIASE bit in REF0CN
enables the on-board reference generator while the REFBE bit enables the gain-of-two buffer amplifier
which drives the VREF pin. When disabled, the supply current drawn by the bandgap and buffer amplifier
falls to less than 1 µA (typical) and the output of the buffer amplifier enters a high impedance state. If the
internal bandgap is used as the reference voltage generator, BIASE and REFBE must both be set to 1 (this
includes any time a DAC is used). If the internal reference is not used, REFBE may be set to logic 0. Note
that the BIASE bit must be set to logic 1 if either ADC is used, regardless of the voltage reference used. If
neither the ADC nor the DAC are being used, both of these bits can be set to logic 0 to conserve power.
Bits AD0VRS and AD2VRS select the ADC0 and ADC2 voltage reference sources, respectively. The elec-
trical specifications for the Voltage Reference are given in Table 10.1.
The temperature sensor connects to the highest order input of the ADC0 input multiplexer (see
“5.1. Analog Multiplexer and PGA” on page 47
Section
ADC). The TEMPE bit within REF0CN enables and disables the temperature sensor. While disabled, the
temperature sensor defaults to a high impedance state and any A/D measurements performed on the sen-
sor while disabled result in meaningless data.
“6.1. Analog Multiplexer and
Figure 10.1. Voltage Reference Functional Block Diagram
Reference
External
Voltage
Circuit
VDD
Recommended Bypass
4.7F
R1
Capacitors
0.1F
PGA” on page
VREFA
VREF
Rev. 1.5
(C8051F041/3 only)
for C8051F041 devices that feature a 12-bit ADC, or
69
REF0CN
C8051F040/1/2/3/4/5/6/7
DAC0
DAC1
for C8051F043/5/7 devices that feature a 10-bit
Ref
REFBE
x2
AV+
(C8051F041/3 only)
1
0
0
1
Band-Gap
BIASE
1.2V
EN
ADC2
Ref
ADC0
Ref
Bias to
ADCs,
DACs
Section
117