C8051F040-TB Silicon Laboratories Inc, C8051F040-TB Datasheet - Page 58

• Manufacturer Part Number: C8051F040-TB
• Description: BOARD PROTOTYPING W/C8051F040
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F040-TB

• Contents: Board
• Processor To Be Evaluated: C8051F04x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F040
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F040/1/2/3/4/5/6/7
58
Bits7-3:
Bits2-0:
AD0SC4
R/W
Bit7
AD0SC4-0: ADC0 SAR Conversion Clock Period Bits
SAR Conversion clock is derived from system clock by the following equation, where
AD0SC refers to the 5-bit value held in AD0SC4-0, and CLK
SAR clock. See Table 5.2 for SAR clock configuration requirements.
AMP0GN2-0: ADC0 Internal Amplifier Gain (PGA)
000: Gain = 1
001: Gain = 2
010: Gain = 4
011: Gain = 8
10x: Gain = 16
11x: Gain = 0.5
*Note: AD0SC is the rounded-up result.
AD0SC
AD0SC3
SFR Definition 5.5. ADC0CF: ADC0 Configuration Register
R/W
Bit6

SYSCLK
---------------------- - 1
CLK
AD0SC2
R/W
Bit5
SAR0
–
AD0SC1
R/W
Bit4
*
or
AD0SC0 AMP0GN2 AMP0GN1 AMP0GN0 11111000
Rev. 1.5
R/W
Bit3
CLK
SAR0
R/W
Bit2
=
----------------------------
AD0SC
SYSCLK
SAR0
R/W
Bit1
refers to the desired ADC0
+
1
SFR Address:
SFR Page:
R/W
Bit0
0xBC
0
Reset Value