C8051F040-TB Silicon Laboratories Inc, C8051F040-TB Datasheet - Page 151

BOARD PROTOTYPING W/C8051F040

C8051F040-TB

Manufacturer Part Number
C8051F040-TB
Description
BOARD PROTOTYPING W/C8051F040
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F040-TB

Contents
Board
Processor To Be Evaluated
C8051F04x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F040
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Bit7:
Bit6:
Bit5:
Bits4-3:
Bit2:
Bit1:
Bit0:
R/W
CY
Bit7
CY: Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry (addition) or a borrow
(subtraction). It is cleared to 0 by all other arithmetic operations.
AC: Auxiliary Carry Flag
This bit is set when the last arithmetic operation resulted in a carry into (addition) or a borrow
from (subtraction) the high order nibble. It is cleared to 0 by all other arithmetic operations.
F0: User Flag 0.
This is a bit-addressable, general purpose flag for use under software control.
RS1-RS0: Register Bank Select.
These bits select which register bank is used during register accesses.
OV: Overflow Flag.
This bit is set to 1 under the following circumstances:
The OV bit is cleared to 0 by the ADD, ADDC, SUBB, MUL, and DIV instructions in all 
F1: User Flag 1.
This is a bit-addressable, general purpose flag for use under software control.
PARITY: Parity Flag.
This bit is set to 1 if the sum of the eight bits in the accumulator is odd and cleared if the sum
is even.
other cases.
• An ADD, ADDC, or SUBB instruction causes a sign-change overflow.
• A MUL instruction results in an overflow (result is greater than 255).
• A DIV instruction causes a divide-by-zero condition.
RS1
0
0
1
1
R/W
AC
Bit6
SFR Definition 12.8. PSW: Program Status Word
RS0
0
1
0
1
R/W
Bit5
F0
Register Bank
RS1
R/W
Bit4
0
1
2
3
Rev. 1.5
RS0
R/W
Bit3
0x00–0x07
0x08–0x0F
0x10–0x17
0x18–0x1F
Address
C8051F040/1/2/3/4/5/6/7
R/W
OV
Bit2
R/W
Bit1
F1
SFR Address:
PARITY
SFR Page:
R/W
Bit0
0xD0
All Pages
00000000
Addressable
Reset Value
Bit
151

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