SAB80C537-N Infineon Technologies, SAB80C537-N Datasheet - Page 39

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SAB80C537-N

Manufacturer Part Number
SAB80C537-N
Description
IC MIRCROCONTROLLER 8BIT 84PLCC
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAB80C537-N

Core Processor
8051
Core Size
8-Bit
Speed
12MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
84-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q1612975

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Table 7
Status of External Pins During Idle and Power Down
Outputs
ALE
PSEN
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Idle Mode
During idle mode all peripherals of the SAB 80C517 are still supplied by the oscillator clock.
Thus the user has to take care which peripheral should continue to run and which has to be
stopped during Idle.
The procedure to enter the Idle mode is similar to entering the power down mode.
The two bits IDLE and IDLS must be set by to consecutive instructions to minimize the chance
of unintentional activating of the idle mode.
There are two ways to terminate the idle mode:
– The idle mode can be terminated by activating any enabled interrupt. This interrupt will be
– The other way to terminate the idle mode, is a hardware reset. Since the oscillator is still
Normally the port pins hold the logical state they had at the time idle mode was activated. If
some pins are programmed to serve their alternate functions they still continue to output during
idle mode if the assigned function is on. The control signals ALE and PSEN hold at logic high
levels (see table 7).
Semiconductor Group
serviced and normally the instruction to be executed following the RETI instruction will be
the one following the instruction that sets the bit IDLS.
running, the hardware reset must be held active only for two machine cycles for a complete
reset.
Idle
High
High
Data
Data/alternate
outputs
Data
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Last instruction executed from
internal code memory
Power down
Low
Low
Data
Data/last output
Data
Data/last output
Data/last output
Data/last output
Data/last output
38
Idle
High
High
Float
Data/alternate
outputs
Address
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Last instruction executed from
external code memory
SAB 80C517/80C537
Power Down
Low
Low
Float
Data/last output
Data
Data/last output
Data/last output
Data/last output
Data/last output