MCU 32KB FLASH EEPROM 32-VFQFPN

STM8S105K6U6

Manufacturer Part NumberSTM8S105K6U6
DescriptionMCU 32KB FLASH EEPROM 32-VFQFPN
ManufacturerSTMicroelectronics
SeriesSTM8S
STM8S105K6U6 datasheet
 

Specifications of STM8S105K6U6

Core ProcessorSTM8Core Size8-Bit
Speed16MHzConnectivityI²C, IrDA, LIN, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o25
Program Memory Size32KB (32K x 8)Program Memory TypeFLASH
Eeprom Size1K x 8Ram Size2K x 8
Voltage - Supply (vcc/vdd)2.95 V ~ 5.5 VData ConvertersA/D 7x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case32-VFQFN, 32-VFQFPNProcessor SeriesSTM8S10x
CoreSTM8Data Bus Width8 bit
Data Ram Size2 KBInterface TypeI2C, SPI, UART
Maximum Clock Frequency16 MHzNumber Of Programmable I/os25
Number Of Timers8Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWSTM8
Development Tools By SupplierSTICE-SYS001Minimum Operating Temperature- 40 C
On-chip Adc10 bit, 7 ChannelFor Use With497-10040 - EVAL KIT STM8S DISCOVERY497-10593 - KIT STARTER FOR STM8S207/8 SER
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther names497-10123
STM8S105K6U6
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List of figures
List of figures
Figure 1. STM8S105xx access line block diagram ................................................................................11
Figure 2. Flash memory organisation ....................................................................................................14
Figure 3. LQFP 48-pin pinout .................................................................................................................22
Figure 4. LQFP 44-pin pinout .................................................................................................................23
Figure 5. LQFP/VFQFPN/UFQFPN 32-pin pinout ................................................................................24
Figure 6. SDIP 32-pin pinout ..................................................................................................................25
Figure 7. Memory map ...........................................................................................................................30
Figure 8. Supply current measurement conditions ................................................................................56
Figure 9. Pin loading conditions .............................................................................................................57
Figure 10. Pin input voltage ...................................................................................................................57
Figure 11. f
versus V
CPUmax
DD
Figure 12. External capacitor C
Figure 13. Typ. I
vs. V
DD(RUN)
DD ,
Figure 14. Typ. I
vs. f
DD(RUN)
CPU ,
Figure 15. Typ. I
vs. V
DD(RUN)
DD ,
Figure 16. Typ. I
vs. V
DD(WFI)
DD ,
Figure 17. Typ. I
vs. f
DD(WFI)
CPU
Figure 18. Typ. I
vs. V
DD(WFI)
DD
Figure 19. HSE external clocksource .....................................................................................................75
Figure 20. HSE oscillator circuit diagram ...............................................................................................76
Figure 21. Typical HSI accuracy at V
Figure 22. Typical HSI accuracy vs V
Figure 23. Typical LSI accuracy vs V
Figure 24. Typical V
and V
IL
IH
Figure 25. Typical pull-up resistance vs V
Figure 26. Typical pull-up current vs V
Figure 27. Typ. V
@ V
= 5 V (standard ports) ................................................................................84
OL
DD
Figure 28. Typ. V
@ V
= 3.3 V (standard ports) .............................................................................85
OL
DD
Figure 29. Typ. V
@ V
= 5 V (true open drain ports) ......................................................................85
OL
DD
Figure 30. Typ. V
@ V
= 3.3 V (true open drain ports) ...................................................................86
OL
DD
Figure 31. Typ. V
@ V
= 5 V (high sink ports) ................................................................................86
OL
DD
Figure 32. Typ. V
@ V
= 3.3 V (high sink ports) .............................................................................87
OL
DD
Figure 33. Typ. V
- V
@ V
DD
OH
Figure 34. Typ. V
- V
@ V
DD
OH
Figure 35. Typ. V
- V
@ V
DD
OH
Figure 36. Typ. V
- V
@ V
DD
OH
Figure 37. Typical NRST V
and V
IL
Figure 38. Typical NRST pull-up resistance vs V
Figure 39. Typical NRST pull-up current vs V
Figure 40. Recommended reset pin protection ......................................................................................92
Figure 41. SPI timing diagram - slave mode and CPHA = 0 ..................................................................94
Figure 42. SPI timing diagram - slave mode and CPHA = 1
Figure 43. SPI timing diagram - master mode
Figure 44. Typical application with I
Figure 45. ADC accuracy characteristics .............................................................................................100
Figure 46. Typical application with ADC ..............................................................................................100
Figure 47. 48-pin low profile quad flat package (7 x 7) ........................................................................104
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..............................................................................................................61
.......................................................................................................62
EXT
HSE user external clock, f
CPU
HSE user external clock, V
HSI RC osc, f
= 16 MHz ..............................................................72
CPU
HSE user external clock, f
CPU
, HSE user external clock V
DD
, HSI RC osc, f
= 16 MHz ................................................................74
CPU
= 5 V vs 5 temperatures ..........................................................77
DD
@ 4 temperatures ..................................................................78
DD
@ 4 temperatures ...................................................................79
DD
vs V
@ 4 temperatures ......................................................................81
DD
@ 4 temperatures ............................................................82
DD
@ 4 temperatures .................................................................82
DD
= 5 V (standard ports) .......................................................................87
DD
= 3.3 V (standard ports) ....................................................................88
DD
= 5 V (high sink ports) ......................................................................88
DD
= 3.3 V (high sink ports) ...................................................................89
DD
vs V
@ 4 temperatures ...........................................................90
IH
DD
@ 4 temperatures .................................................91
DD
@ 4 temperatures ......................................................91
DD
(1)
(1)
...................................................................................95
2
C bus and timing diagram
DocID14771 Rev 10
STM8S105xx
= 16 MHz ...........................................71
= 5 V ..................................................72
DD
= 16 MHz ............................................73
= 5 V ....................................................73
.............................................................94
(1)
.......................................................96