EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 296

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

8
8-32
Graphics Accelerator
EP93xx User’s Guide
D:
M:
SYDIR, SXDIR:
DYDIR, DXDIR:
Copyright 2007 Cirrus Logic
‘1’ - Pixel Expansion Mapping Function enabled
‘0’ - Pixel Expansion Mapping Function disabled
The Pixel Expansion Mapping Function converts single bit
pixels in the source image to defined pixel-depth (see
Table
When BG = ‘0’, source image pixels are unaffected
(transparent) when they are copied to the destination
image. When BG = ‘1’, source image pixels that have a
value of ‘0’ are copied to the destination image with the
color value in the BG field of the
and source image pixels that have a value of ‘1’ are copied
to the destination image with the color value in the MASK
field of the
Destination Mode - Read/Write
The value in the this field specifies the destination mode:
‘00’ - Disabled
‘01’ - Destination AND Mode
‘10’ - Destination OR Mode
‘11’ - Destination XOR Mode
Mask Mode - Read/Write
The value in the this field specifies the mask mode:
‘00’ - Disabled
‘01’ - Mask AND Mode
‘10’ - Mask OR Mode
‘11’ - Mask XOR Mode
Counter/Accumulator Direction - Read/Write
Write the values of the DYDIR and DXDIR bits to the
SYDIR and DXDIR bits, respectively.
Counter/Accumulator and Line Direction - Read/Write
The value of these bits specifies the general direction that
the current Graphics Acceleration function places pixels
on the display:
For a Block Fill or Block Copy function:
DXDIR = ‘1’ - Left in X
DXDIR = ‘0’ - Right in X
DYDIR = ‘1’ - Up in Y
8-23) pixels in the destination image.
BLOCKMASK
register.
BACKGROUND
DS785UM1
register