EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 475

• Manufacturer Part Number: EP9302-CQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-CQZ

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Data Ram Size: 16 bit
• Interface Type: USB, USART, SPI
• Maximum Clock Frequency: 200 MHz
• Number Of Programmable I/os: 37
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1137

DS785UM1
Note: This bit is always reads “1” if power switching is not supported.
Note: If the DeviceRemovable.NDP bit is set, this bit is set only after a Root Hub reset to inform
the system that the device is attached.
LSDA:
CSC:
PESC:
PSSC:
Copyright 2007 Cirrus Logic
(WRITE) SetPortPower: The HCD writes a “1” to set the
PortPowerStatus bit. Writing a “0” has no effect.
(READ) LowSpeedDeviceAttached. This bit indicates the
speed of the device attached to this port. When set, a Low
Speed device is attached to this port. When clear, a Full
Speed device is attached to this port. This field is valid
only when the CurrentConnectStatus is set.
0 = full speed device attached
1 = low speed device attached
(WRITE) ClearPortPower. The HCD clears the
PortPowerStatus bit by writing a “1” to this bit. Writing a “0”
has no effect.
ConnectStatusChange. This bit is set whenever a connect
or disconnect event occurs. The HCD writes a “1” to clear
this bit. Writing a “0” has no effect. If
CurrentConnectStatus is cleared when a SetPortReset,
SetPortEnable, or SetPortSuspend write occurs, this bit is
set to force the driver to re-evaluate the connection status
since these writes should not occur if the port is
disconnected.
0 = no change in CurrentConnectStatus
1 = change in CurrentConnectStatus
PortEnableStatusChange. This bit is set when hardware
events cause the PortEnableStatus bit to be cleared.
Changes from HCD writes do not set this bit. The HCD
writes a “1” to clear this bit. Writing a “0” has no effect.
0 = no change in PortEnableStatus
1 = change in PortEnableStatus
PortSuspendStatusChange. This bit is set when the full
resume sequence has been completed. This sequence
includes the 20 ms resume pulse, LS EOP, and 3 ms
re-synchronization delay. The HCD writes a “1” to clear
this bit. Writing a “0” has no effect. This bit is also cleared
when ResetStatusChange is set.
0 = resume is not completed
1 = resume completed
Universal Serial Bus Host Controller
EP93xx User’s Guide
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