PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 8

• Manufacturer Part Number: PIC24F16KA102-I/SS
• Description: IC PIC MCU FLASH 16K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 16KB (5.5K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 512 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1.5 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

hexadecimal). The device will enter Program/Verify
PIC24FXXKAXXX
3.3
3.3.1
As illustrated in Figure 3-4, the following processes are
involved in entering ICSP Program/Verify mode using
MCLR:
1.
2.
3.
The programming voltage V
is V
is no minimum time requirement for holding at V
After V
elapse before presenting the key sequence on PGDx.
The key sequence is a specific 32-bit pattern:
‘0100 1101
0001‘ (more easily remembered as 4D434851h in
mode only if the sequence is valid. The Most Significant
bit (MSb) of the most significant nibble must be shifted in
first.
Once the key sequence is complete, V
applied to MCLR and held at that level for as long as
the Program/Verify mode is to be maintained. An
FIGURE 3-4:
FIGURE 3-5:
DS39919A-page 8
MCLR
V
PGDx
PGCx
V
V
PGDx
PGCx
DD
DD
PP
DD
MCLR is briefly driven high, then low.
A 32-bit key sequence is clocked into PGDx.
MCLR is then driven high within a specified
period of time and held.
in the case of PIC24FXXKAXXX devices. There
IH
Entering ICSP Mode
is removed, an interval of at least P18 must
LOW-VOLTAGE ICSP ENTRY
P6
0100
P6
P14
ENTERING ICSP™ MODE USING LOW-VOLTAGE ENTRY
ENTERING ICSP™ MODE USING HIGH-VOLTAGE ENTRY
0011
P18
P18
IH IS
V
b31
b31
IH
0
0
0100
applied to MCLR; this
b30
b30
1
1
Program/Verify Entry Code = 4D434851h
Program/Verify Entry Code = 4D434851h
V
IHH
b29
b29
0
0
1000
IH
b28
P1A
b28
P1A
Advance Information
0
0
must be
P1B
P1B
b27
b27
0101
1
1
IH
...
...
.
b3
b3
0
0
interval of at least P19 and P7 must elapse before
presenting data on PGDx. Signals appearing on PGCx
before P7 has elapsed would not be interpreted as
valid.
3.3.2
Entering the ICSP Program/Verify mode, using the V
pin is the same as entering the mode using MCLR. The
only difference is the programming voltage applied to
V
on PGDx, an interval of at least P18 should elapse (see
Figure 3-5).
Once the key sequence is complete, an interval of at
least P7 should elapse, and the voltage should remain
at V
as long as the Program/Verify mode is to be main-
tained. An interval of at least P7 must elapse before
presenting the data on PGDx.
Signals appearing on PGDx before P7 has elapsed will
not be interpreted as valid.
Upon a successful entry, the program memory can be
accessed and programmed in serial fashion. While in
ICSP mode, all unused I/Os are placed in a
high-impedance state.
b2
b2
0
0
PP
IHH
is V
b1
b1
0
0
V
. The voltage, V
IH
IHH
b0
b0
1
1
HIGH-VOLTAGE ICSP ENTRY
, and before presenting the key sequence
P19
P7
P7
IHH
© 2008 Microchip Technology Inc.
, must be held at that level for
V
IH
PP